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In-line upgrade system for in-situ programmable gate array program and its implementation method

A gate array and program technology, applied in the field of external bus updating FPGA program, can solve problems such as unfavorable upgrade programs

Inactive Publication Date: 2003-02-19
TSINGHUA UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Connect another programming bus through the control circuit, transfer the program to the control circuit through the programming bus and write it into the non-volatile memory. Its advantage is that the system can upgrade the program online without power-off, and the implementation is simple; but it requires Special programming cable is not conducive to users to upgrade the program by themselves

Method used

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  • In-line upgrade system for in-situ programmable gate array program and its implementation method
  • In-line upgrade system for in-situ programmable gate array program and its implementation method
  • In-line upgrade system for in-situ programmable gate array program and its implementation method

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Embodiment Construction

[0020] please see image 3 : 3 is the dedicated programming bus, the rest are with figure 1 same. When working, FPGA and external buses work according to their own design requirements and are not affected by the control circuit. During programming, the external bus transmits data to the FPGA through a certain agreed method, and the FPGA transmits the data to the control circuit through the dedicated programming bus 3, and then writes the data into the non-volatile memory. Figure 4 yes image 3 An example of . The dedicated programming bus is the I2C bus. The FPGA is the 10K30 of the FLEX10K series of Altera Company. The FPGA is connected to the microcomputer through the external bus—PCI bus, and then transmits the data to the control circuit made by the chip EPM7064S through the two-wire transmission protocol of I2C. The control circuit is bidirectionally connected with the nonvolatile memory made of SST company chip 29EE010.

[0021] goodbye Figure 5 : The FPGA progr...

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Abstract

An in-line upgrade system for FPGA program is composed of FPGA connected to external bus, controller connected to said FPGA, and non-volatile memory connected with the said controller. Its upgrade method includes running particular program by user, sending I / O instruction to external bus, transmitting data to or from FPGA, and writing or reading data to or from the non-volatile memory by controller.

Description

technical field [0001] The field programmable gate array (FPGA) program online upgrade system and its implementation method belong to the field of FPGA online program upgrade technology, and in particular relate to a system and its implementation method for updating the FPGA program by using an external bus connected to the FPGA after the system is powered on. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA) is widely used in electronic equipment because it can realize the function of Application Specific Integrated Circuit (ASIC) and avoid the disadvantages of long cycle and high cost of using ASIC. Applications. [0003] The logic function of FPGA is realized through its internal static random access memory (Static Random Access Memory, SRAM). Because SRAM is a volatile memory, all the SRAM information describing its function will be lost when the FPGA is powered off. We call the SRAM information describing the logic funct...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/44G06F13/14
Inventor 张承蒋东兴
Owner TSINGHUA UNIV
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