Balance symmetric type read-out amplifier circuit for nonvolatile memory

Abstract

The invention is a balance symmetrical reading amplifying circuit for fixed memory, it includes: at least a difference amplifier and two data wires which connects the two ends of the amplifier; the character is: the bit lines of the memorizing unit array are divided into odd and even number bit line; sets odd and even series multiplier circuits to each bit line, the odd and even number bit line connects with odd and even bit data wires throgh odd and even series multiplizer; at least two odd / even bit character lines which connects all the control ends of the odd / even multiplier circuit; at least a parallel emulational bit line whose resistance matches with bit line at the proper place of memorizing unit array, it connects with a refernece current source and two even / odd emulational seriesmultiplier circuits, the emulational bit lines connects with odd / even data wires through odd. even emulational series multiplizer circuits.

Description

technical field [0001] The invention relates to an auxiliary circuit of a semiconductor memory, more specifically, to a balanced symmetrical input circuit of a data sense amplifier of an electrically erasable (erasable) programmable read-only memory. Background technique [0002] As we all know, volatile memories, such as dynamic random access memories (DRAMs) and static random access memories (SRAMs), can store data, but once the chip loses power, all the stored data will be lost. In contrast, non-volatile memories, such as read-only memories (ROMs), electrically programmable read-only memories (EPROMs), and electrically programmable and erasable read-only memories (EEPROMs), retain all of their memory after the chip is powered off. Stored data (that is, written data). Therefore, non-volatile memory is especially suitable for portable products that use battery power and require low power consumption, and EEPROMs are also particularly useful for systems that require program...

AI Technical Summary

Problems solved by technology

[0019] 1. It is required to suspend the erasing operation of the storage unit group that is playing the role of balancing load, so that the data stored in the storage unit group of balancing load will be lost. These data will need to be reloaded and rewritten, wasting processing time

[0020] 2. Especially in products such as automotive electronics that require high-temperature operation, the problem of small leakage current of memory cells that are not fully corrected cannot be solved

[0021] 3. The data line passes through the four memory cell groups to connect the multiplier circuit, resulting in long leads, which increases the input capacitive load of the sense amplifier, thus reducing the speed of the read operation and affecting the performance of the memory;

[0022] 4. The solution of multiple storage unit groups is not suitable for small-area storage devices. When a small storage array is divided into multiple storage unit groups, due to the use of additional multiplier circuits and decoding circuits, the chip area will be paid. expensive

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