Field effect transistor adapted for extra-dup submicrometer field and preparation process thereof
A field-effect transistor, ultra-deep sub-micron technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve the effects of ensuring overdrive capability, suppressing inter-band tunneling current, and reducing source-drain parasitic capacitance
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[0056] As shown in FIG. 1( a ), it is a schematic diagram of the field effect transistor structure of the present invention. In this field effect transistor structure, the most important components are the first dielectric isolation layer and the second dielectric isolation layer. The first dielectric isolation layer is between the source and drain and the body region, and is perpendicular to the direction of the channel. The second dielectric isolation layer is located under the source and drain and parallel to the direction of the channel. The two are connected into an "L" shape. There is a certain distance between "L" and the surface of the silicon chip, which is the connection between the source and drain and the channel. The first dielectric isolation layer of the vertical part is formed of silicon nitride, and the second dielectric isolation layer of the horizontal part is formed of a void layer.
[0057] The above-mentioned field effect transistor is manufactured usi...
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