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Method of improving reliability of flash memory

A memory and reliability technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of semiconductor wafer 10 over-polishing, good rate decline, high cost, etc., to improve random bit failures and improve product reliability The effect of sex and process simplification

Inactive Publication Date: 2003-11-05
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the CMP process may still cause over-polishing of some areas on the surface of the semiconductor wafer 10, resulting in a decrease in good rate and high cost.

Method used

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  • Method of improving reliability of flash memory
  • Method of improving reliability of flash memory
  • Method of improving reliability of flash memory

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Embodiment Construction

[0033] Please refer to Figure 8 to Figure 12 , Figure 8 to Figure 12 It is a schematic cross-sectional view of fabricating a high-reliability flash memory unit in a preferred embodiment of the method of the present invention. For the convenience of describing the present invention, Figure 8 to Figure 12 Only a part of the flash memory area relevant to the method of the present invention is shown. In the preferred embodiment of the method of the present invention, a dual-bit flash memory unit 110 is taken as an example for illustration. First, if Figure 8As shown, the semiconductor wafer 80 includes a silicon substrate 82, an active area (active area) isolated by a shallow trench isolation (shallow trench isolation, STI) region 84 is provided on the silicon substrate 82, and two gates Structure 94 is provided in the active area. The gate structure 94 has a gate oxide layer or tunnel oxide layer 86 on the surface of the silicon substrate 82, a polysilicon layer or PL1 l...

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Abstract

The method of improving the reliability of flash memory includes the following steps: forming one stacked layer on one substrate including one first polysilicon layer and one sacrificial layer on thepolysilicon layer, forming high temperature oxide (HTO) film to cover the stacked layer, depositing one dielectric layer on the HTO film, wet etching the dielectric layer and the HTO film to expose the sacrificial layer, eliminating the sacrificial layer completely and at least one pickling, soaking and cleaning process. The HTO film can strengthen the interface between the dielectric layer and the first polysilicon layer to avoid acid erosion cracking during the pickling, soaking and cleaning process.

Description

technical field [0001] The present invention provides a manufacturing method for improving the reliability of a flash memory, and in particular relates to a method of utilizing an HTO (high temperature oxide) film to reduce random bit failures (random bit failure) generated when manufacturing a flash memory, A method for improving the reliability of the flash memory. Background technique [0002] In recent years, as the demand for portable electronic products increases, the technology and market applications of flash memory are becoming increasingly mature and expanding. These portable electronic products include negatives of digital cameras, mobile phones, video game apparatuses, memories of personal digital assistants (PDAs), telephone answering devices, programmable ICs, and the like. Flash memory is a non-volatile memory (non-volatile memory). Its operating principle is to control the switching of the gate channel by changing the threshold volt...

Claims

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Application Information

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IPC IPC(8): H01L21/8239
Inventor 黄文信张国华
Owner MACRONIX INT CO LTD
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