Integrated circuit with nonvoltile data memory circuit

Abstract

An integrated circuit has a sleep switch, provided between a first power line and a second power line, which is constituted by a transistor of a first threshold voltage, and which becomes non-conducting in a sleep mode, and further has a latch circuit, connected to the second power line, which is constituted by a transistor of a second threshold voltage which is lower than the first threshold voltage, and a ferroelectric capacitor for storing data held in the latch circuit in accordance with the polarization direction of a ferroelectric film thereof. The integrated circuit also comprises a control signal generating circuit which, when returning to an active mode from the sleep mode, generates a plate signal for driving a terminal of the ferroelectric capacitor to generate a voltage in the latch circuit in accordance with the polarization direction, and generates a sleep signal for causing the sleep switch to conduct to thereby activate the latch circuit following the driving of the ferroelectric capacitor.

Description

[0001] This application is based on and claims the benefit of priority from Japanese Patent Application No. 2002-247346 filed on August 27, 2002, the entire contents of which are incorporated herein by reference. technical field [0002] The present invention relates to an integrated circuit having a non-volatile data storage circuit in multi-threshold voltage CMOS to achieve low power consumption, and in particular, the present invention relates to an integrated circuit capable of simplifying power supply layout and avoiding errors in data recovery operations operating integrated circuits. Background technique [0003] Multi-threshold voltage CMOS (MTCMOS) has been proposed as a technology for reducing power consumption in LSI (Large Scale Integration). According to this MTCMOS technology, for example, as described in Non-Patent Document 1 below, high-current drive capability of low-Vth transistors and low leakage quality of high-Vth transistors are used to realize high-spe...

AI Technical Summary

Problems solved by technology

[0015] However, in the nonvolatile latch circuit used in the nonvolatile SRAM of Non-Patent Document 2, when the power is turned on again, there arises a problem in that due to the irregularity of the transistor characteristics of the latch circuit, recovery data is prone to inversion

However, the latch circuit in this application does not use MTCMOS technology

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