Method of production of semiconductor device

Abstract

A method of production of a semiconductor device able to utilize a conventional production system for a resin board to thereby produce a wafer level package without increasing the production cost, comprising electrolessly plating the electrode terminals to cover the surfaces of the electrode terminals by a protective film protecting the electrode terminals from laser beams; grinding the back side of the semiconductor wafer to reduce the thickness of the semiconductor wafer before or after forming the protective film; covering the entirety of the electrode terminal forming surface and back side of the semiconductor wafer, having the electrode terminals covered by a protective film and processed to reduce the thickness of the semiconductor wafer, by a resin to form a laminate; and focusing a laser beam toward the electrode terminal forming surface of the semiconductor wafer from outside the laminate to form via holes with the protective film exposed at their bottom surfaces, then filling the via holes by electroplating to form the conductor parts.

Description

technical field [0001] The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a wafer level package. Background technique [0002] For a method of manufacturing a semiconductor device, there is a method including forming an insulating layer, an interconnection pattern, external electrode terminals, etc. on the surface of the semiconductor wafer in a state of a semiconductor wafer, wherein the semiconductor chips are formed by mounting in a predefined arrangement, and finally the Semiconductor wafers are diced into individual parts to manufacture chip-scale semiconductor devices (wafer-level packaging). A method of manufacturing a semiconductor device described in Japanese Unexamined Patent Application Publication No. 2002-93942 includes forming a reinterconnection layer on a surface of a semiconductor wafer where electrode terminals are formed, forming a reinterconnection layer on the backside of...

AI Technical Summary

Problems solved by technology

Therefore, the manufacture of such products requires the use of expensive manufacturing systems such as thin film forming systems or exposure systems

In particular, when manufacturing semiconductor packages using large-sized semiconductor wafers of 300 mm (12 inches), which are expected to increase in usage, it is necessary to build a new manufacturing system, and therefore, poses a problem requiring further investment

[0005] The wafer-level package has a thermal expansion coefficient substantially equal to that of the silicon material of the semiconductor wafer, so when the wafer-level package is mounted on a resin board (mounting circuit board) made of resin commonly used as a mounting circuit board, the thermal expansion coefficient Significantly different from that of resin boards, thus posing problems of thermal stress on the connection portion of the wafer-level package and the resin board (solder ball) and cracking of the connection portion

For such products, the package cannot be adequately protected

Also, the backside is not electrically isolated, so short circuits can occur on the backside of the package

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