Memory system and memory module

Abstract

To increase data transfer rate of a memory system in which a plurality of memory modules are stacked using mezzanine connectors, stacked blind vias and buried vias for connecting only specific layers are used as vias in a multilayer circuit board serving as a memory module board, and at least some of pads for mounting devices have a pad-on-via structure. Thus, the vias have no redundant portions which are not required for signal transmission and the length of surface-layer wiring can be remarkably reduced.

Description

technical field [0001] The present invention relates to memory systems and, more particularly, to memory modules including mezzanine connectors (female and / or male) attached to a module board for stacking multiple memory modules on a motherboard, and to using the Memory system for memory modules. Background technique [0002] A memory system in which a memory controller is connected to the memory through a transmission line includes the use of double data rate synchronous DRAM (DDR-DRAM). This memory system is hereinafter referred to as a DDR memory system. In a DDR memory system, data signals are transmitted bi-directionally between the memory controller and each memory at a data transfer rate twice the clock frequency. On the other hand, at the same data transfer rate as the clock frequency, that is, at 1 / 2 of the data transfer rate of the data signal, the command signal indicating the read or write mode or the command signal indicating the read or write mode is transmit...

AI Technical Summary

Problems solved by technology

However, Patent Document 3 provides no suggestion regarding the application of interstitial vias to memory systems, especially the increase in memory data transfer rate

In addition, Patent Document 3 does not disclose and suggest that when the mezzanine connector technology is introduced in the memory system, the cause of the increase in the interference data transfer rate

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