Programmable device program update method and board card capable of updating program

A program update and update program technology, applied in the field of computer communication, can solve the problems of occupying FLASH space, slow device startup, difficult update, etc., achieve the effect of fast download speed, high reliability, and avoid duplication of labor

Inactive Publication Date: 2005-10-05
MAIPU COMM TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Now, the storage, download and update operations of the FPGA download program on the communication equipment board are generally divided into two types, one is to use the memory solidified on the board, and each time the power is turned on, the FPGA actively transfers data from the memory. This method The advantage is that the download does not depend on the participation of the main system, and the speed is fast, but the disadvantage is that it is not easy to update; and another way is to store the FPGA download program in the FLASH on the motherboard, read and write it by the host, and FPGA downloads through public data The channel and conversion chip are completed. The advantage of this method is that the code can be updated flexibly, but the disadvantage is that it takes up the FLASH space of the main system, and the main processor must also participate in the entire download process, resulting in slow device startup.

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  • Programmable device program update method and board card capable of updating program
  • Programmable device program update method and board card capable of updating program
  • Programmable device program update method and board card capable of updating program

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Embodiment Construction

[0019] Such as figure 1 As shown, the whole process is divided into three steps, including update, verification and activation. When updating, the system passes the I 2 The C bus sets the CPLD one register to initiate the FPGA download file update, and starts to pass the I 2 C bus sends new data. After the CPLD receives the data, it converts the data format, and sends it to the data port of the memory after the encryption algorithm operation, and sends the data address at the same time. The memory storage space will be divided into two parts, one part stores the newly written program, and the other part stores the program that can be used normally before the update (or the program when it leaves the factory). The two segments are interchangeable, and the specific part will be Which segment the new program is written into or the content of which segment is downloaded to the FPGA is controlled by the host system by setting the register value. After the data writing is comple...

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Abstract

A program updating method of programmable device and a program updating boardcard, relating to a storing and updating technique of downloading files of the programmable device on the boardcard of communication equipment. The invention provides a program updating method of programmable device, including the following steps: a. the system informs a processing device to initiate updating by the I2C bus and the processor device prepares; b. the processing device receives and stores data; c. the processing device informs the main system to stop running the programmable device; d. the processing device downloads the new program stored in the step b to the programmable device. The invention provides a boardcard able to update the program. The beneficial effects of the invention: on the condition of increasing the cost of a few materials, it completes program downloading for FPGA as the boardcard is power-on by CPLD and completes program updating by the I2C bus independent of data channels, not only achieving the requirements of high downloading speed and high reliability but also the downloading and updating little occupying system resources.

Description

technical field [0001] The invention relates to computer communication technology, in particular to a technology for storing and updating downloaded files of programmable devices on communication equipment boards. Background technique [0002] I 2 The C bus (or IIC bus) is a two-wire serial bus developed by Philips. The main advantage is its simplicity and effectiveness. It occupies a very small space, thereby reducing the space on the board and the chip. The number of pins reduces interconnection costs. At the same time I 2 C is a general specification, and most embedded processors integrate this bus, which is convenient for porting in the hardware system. [0003] FPGA (Field Programmable Gate Array) is a programmable device with flexible structure and high internal trigger resource density. Users can change the internal wiring of the device through programming to make it present different functions. With the rapid development of EDA (Electronic Design Automation) tech...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/445
Inventor 何驰唐正涛徐放
Owner MAIPU COMM TECH CO LTD
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