Method of forming shallow trench isolation structure in a semiconductor device

Abstract

A method (Figs. 3A-3I) for fabricating a shallow trench isolation structure (Fig. 4) is described, in which a bottom pad oxide layer (62), a middle silicon nitride layer (64), a middle oxide layer (66) and a top silicon nitride layer (68) are sequentially formed on a silicon substrate (60). Photo-lithographic masking and anisotropic etching are then conducted to form a trench (70) in the substrate. An oxide material (80) is then deposited on top of the top silicon nitride layer, filling up the trenches at the same time (Fig. 3E). The top silicon nitride layer is then removed, followed by an isotropic etch of the oxide layer below. With the middle nitride layer acting as a natural etch stop, the oxide material is sculpted to a desirable shape. The middle nitride layer and the pad oxide layer are subsequently removed to complete the fabrication of a shallow trench isolation structure.

Description

technical field

[0001] The present invention relates to methods of manufacturing integrated semiconductor circuits. In particular, the present invention relates to a method of manufacturing a shallow trench isolation structure. technical background

[0002] In high-density packaging integrated circuit manufacturing technology, fabricating shallow trench isolation structures (STI) around active devices is an effective method to prevent the carrier from penetrating from the substrate to adjacent devices. A common process for forming an STI structure is shown in FIG. 1 . In FIG. 1A , a pad oxide layer 12 and a silicon nitride layer 14 are sequentially formed on top of a semiconductor substrate 10 . In FIG. 1B , a shallow trench 16 is formed by photoimaging masking and anisotropic etching of the capping layers 12 , 14 and semiconductor substrate 10 . In FIG. 1C, a thin oxide liner 18 is formed on the bare silicon substrate by thermal oxidation. Subsequently, an oxide materia...

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