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Method for mfg. double layer polysilicon rewritable non-volatile memory

A non-volatile, polysilicon technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of complex manufacturing process, increase production cost, and lengthen process cycle, so as to reduce production cost and simplify process flow , The effect of shortening the process cycle

Active Publication Date: 2006-01-11
ADVANCED SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, the manufacturing process becomes very complicated, which prolongs the process cycle on the one hand and increases the production cost on the other hand.

Method used

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  • Method for mfg. double layer polysilicon rewritable non-volatile memory

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Embodiment Construction

[0036] The above and other features, nature and advantages of the present invention will become more apparent in the following detailed description in conjunction with the above-mentioned accompanying drawings.

[0037] Figure 11 Shown is a production process flow chart according to an embodiment of the present invention, which depicts the process flow of manufacturing double-layer polysilicon electrically rewritable non-volatile memory, the most important features of which are high-voltage MOS devices and low-voltage MOS devices. The device uses the same N-well and P-well. and Figure 2-Figure 10 The component structure diagram after each process step is revealed in detail. Attached below Figure 2-11 The process flow of this embodiment is described in detail.

[0038] figure 2 Shown is a structural diagram of a silicon substrate used to prepare the double-layer polysilicon electrically rewritable non-volatile memory of the present invention. The present invention ado...

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Abstract

This invention provides a method for manufacturing double-layer polysilicons to re-write fixed storages including the following steps: forming trap N and trap P of high and low voltage MOS devices and multiple isolation zones, carrying out ionic injection dope in a tunnel injection zone of the storage unit, forming a grid oxidation layer of the storage unit, a tunnel penetration window thin grid oxidation layer, polysilicon floating grid and lower electrode of the condenser, depositing ONO complex medium layer and etching it, re-forming a thick grid oxidation layer in the region corresponding to the high voltage MOS device and forming its thin grid oxidation layer corresponding to the low voltage MOS device, depositing a second polysilicon and etching the control grid forming the storage unit and the logic grid forming MOS devices and the upper electrode of the condenser to dope the storage unit, source and drain of the MOS devices.

Description

technical field [0001] The invention relates to a method for manufacturing a double-layer polysilicon memory element, more precisely, a method for manufacturing a double-layer polysilicon rewritable non-volatile memory. Background technique [0002] To manufacture double-layer polysilicon rewritable non-volatile memory, it is usually to embed electrically programmed non-volatile memory on the basis of double-layer polysilicon CMOS. [0003] The embedded electrically rewritable non-volatile memory unit uses a MOS transistor with a floating polysilicon gate electrode superimposed on a control gate electrode as the basic unit structure of the non-volatile memory. The floating polysilicon gate electrode and the drain region have a large overlapping area, and a very thin (80A) tunnel penetrating small window of the gate oxide layer is specially designed in the middle of the thick gate oxide layer (400A) in the overlapping area. [0004] When using non-volatile memory cells, the ...

Claims

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Application Information

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IPC IPC(8): H01L21/8247H01L21/8239
Inventor 高明辉
Owner ADVANCED SEMICON MFG CO LTD
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