The invention discloses a single-polycrystalline
EEPROM (Electrically Erasable Programmable Read-Only Memory) switch
unit structure, which belongs to the field of microelectronic devices and comprises a p-type
Si substrate, a
shallow trench isolation (STI), a
gate oxide layer, a polycrystalline layer and a liner. A high-
voltage p well and a high-
voltage n well are formed on the p-type
Si substrate; the surface of the p-type
Si substrate is divided into three areas, namely a switch tube area, a
programming tube area and a control gate area, by a plurality of STIs (shallow trench isolators); a tunneling injection layer is formed on the surface of the
programming tube region through n-type
ion doping; the
gate oxide layer is located on the surface of the p-type Si substrate; the polycrystalline layer is deposited on the surface of the
gate oxide layer and covers the switch tube region, the
programming tube region, the control gate region and the
shallow trench isolation STI; the pads are located on the two sides of the polycrystalline layer, and an N +
ion implantation layer and a P +
ion implantation layer are formed on the p-type Si substrate through the gate self-alignment process of the pads. According to the invention, a repeated and accurate trimming function can be realized; the method has the prominent advantages of flexible trimming, high trimming yield, low process cost, easy realization of process
transplantation and the like.