Clock phase-locked loop apparatus

A phase-locked loop and clock technology, which is applied in the field of clock synchronization devices, can solve the problems of narrow application occasions of clock phase-locked loop devices, low precision of phase-locked loop synchronization, and increased costs, so as to improve the scope of application and accuracy High, the effect of reducing failure

Active Publication Date: 2006-05-10
DATANG MOBILE COMM EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] The problem solved by the present invention is that in the existing clock phase-locked loop device, a voltage-controlled oscillator and a D/A converter are used to control the clock frequency, which causes the clock phase-locked loop device to have narrow application oc

Method used

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  • Clock phase-locked loop apparatus

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Embodiment Construction

[0033] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0034] see figure 2 , which is a structural schematic diagram of a clock phase-locked loop device for realizing clock synchronization in the present invention. It includes a phase detector 11, a loop filter 12, a direct digital frequency synthesis (Direct Digital Fraquency Synthesis is DDFS, generally referred to as DDS, and the present invention is called a DDS unit) 17, a frequency divider 15, a processor 16 and provides the DDS unit with The clock's local clock source 18, where:

[0035] Direct digital frequency synthesis is a frequency synthesis technology that directly synthesizes the required waveform from the concept of phase. The unit that uses the above technology for frequency output is called a DDS unit. The DDS unit requires a high-stability reference clock as the clock reference source of the unit, so the local clock source 18 of the present inventio...

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Abstract

This invention discloses one time phase locking loop device to realize the consistency between output clock frequency and received reference clock frequency, which comprises the following parts: phase test device, loop filter, processor, frequency divider, DDS unit and the said DDS local time source, wherein, the DDS unit connected with processor and division device is to adjust the output time frequency according to the frequency difference and to lock the said reference time frequency; The DDS unit is to generate different frequency range and drive range under the control of processor to make the lock loop device in large utility and common use.

Description

technical field [0001] The invention relates to a device for realizing clock synchronization in the communication field, in particular to a clock phase-locked loop device. Background technique [0002] Synchronization is the basis for mutual communication between various devices in the communication system. If the two parties in the communication do not establish good synchronization, there will inevitably be code errors and code slips during the transmission of information, resulting in a decline in communication quality. as a result of. For example, for a voice call, if the two parties in the call start talking without establishing synchronization, both parties may hear a clicking sound, and even cause the two parties to be unable to communicate; It may cause consequences such as incomplete or ambiguous information received by the receiver; therefore, in order to ensure the communication quality of various services of both parties, synchronization is essential in the comm...

Claims

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Application Information

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IPC IPC(8): H03L7/18H03L7/06H04L7/00
Inventor 刘飚何宇东
Owner DATANG MOBILE COMM EQUIP CO LTD
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