Ceria serosity combination with reinforced polishing uniformity

A technology of polishing slurry and cerium oxide, which is applied to polishing compositions containing abrasives, other chemical processes, chemical instruments and methods, etc., can solve problems such as deterioration of wafer surface uniformity, deterioration of device reliability, and increase in circuit resistance , to achieve the effect of improving polishing uniformity, reducing dishing and erosion
CN1872900AInactive Publication Date: 2006-12-06DONGJIN SEMICHEM CO LTD
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Applications(China)
Current Assignee / Owner
DONGJIN SEMICHEM CO LTD
Publication Date
2006-12-06
Estimated Expiration
Not applicable Β· inactive patent

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Abstract

The invention discloses a chemical mechanical polishing slurry compound. It comprises: ceric oxide grinding agent; polycarboxylic acids or polycarboxylate with weight average molecular weight being 50,000-500,000; alcohol compound and water. The optimum proportion by weight of components in relative to total slurry compound are: ceric oxide grinding agent 0.1-20%, polycarboxylic acids or polycarboxylate 0.01-20%, alcohol compound 0.001-10%, and the pH of said slurry is 5-10. The CMP slurry compound is processed with STI (shallow slot insulation) method to form multiplayer construction and increase polishing uniformity and inhibit dent and corrosion of chip.
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Description

field of invention

[0001] The present invention relates to ceria slurry compositions having enhanced polishing uniformity, and more particularly, to chemical mechanical polishing (CMP) slurry compositions having enhanced polishing uniformity on silicon wafers and inhibiting dishing of the wafers (dishing) and erosion (erosion). Background of the invention

[0002] Recently, high-capacity memory devices have been developed due to the development of semiconductor device manufacturing technology, and the wide application of memory devices. Capacity expansion technology for storage devices is based on micro-processing technology whose precision doubles with every generation. In particular, reducing the size of the device isolation layer of the isolation circuit device becomes important. LOCOS (Local Oxidation of Silicon) is commonly used as a device isolation technique, which is the selective growth of thick SiO 2 layer to form a device isolation layer technology. However, t...

Claims

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