Dram and method for accessing a dram

Abstract

The present disclosure provides a method. The method includes copying a data stored in memory cells associated with a normal word line subject to a row hammer effect into memory cells associated with a hot word line before a condition is satisfied, wherein the condition includes an access frequency of the normal word line reaching a threshold frequency; accessing, based on a logical address, the normal word line before the condition is satisfied; accessing, based on the logical address, the hot word line associated with the copied data only if the condition is satisfied; and accessing the data no longer from the normal word line only if the condition is satisfied.

Description

TECHNICAL FIELD[0001]The present disclosure relates to a dynamic random access memory (DRAM), and more particularly, to a DRAM and method for accessing a DRAM.DISCUSSION OF THE BACKGROUND[0002]Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor. A simplest DRAM cell comprises a single N-type metal-oxide-semiconductor (NMOS) transistor and a single capacitor. If charges are stored in the capacitor, the cell is said to store a logic HIGH, depending on the convention used. If no charge is present, the cell is said to store a logic LOW. Because the charges in the capacitor dissipate over time, DRAM systems require additional refreshing circuitries to periodically refresh the charges stored in the capacitors. Since a capacitor can store only a very limited amount of charges, in order to quickly distinguish the difference between a logic 1 and a logic 0, two bit lines (BLs) are typically used for each bit, wherein the ...

AI Technical Summary

Benefits of technology

This patent describes a method to alleviate a problem called "row hammer" in DRAM memory cells. The problem occurs when a particular part of the memory repeatedly accesses data, causing neighboring cells to lose data. The solution involves copying data from frequently accessed memory cells to other areas to avoid the problem. This approach does not increase the refresh rate or limit the number of accesses, but it does reduce the likelihood of losing data.

Problems solved by technology

However, a relatively low number of accesses may be accompanied by a relatively low performance of the DRAM.

However, the DRAM will consume more power when the refresh rate is relatively high.

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