Semiconductor device and method for fabricating the same

Abstract

In a method for fabricating a semiconductor device, a silicide material is formed at least on the surface of an area to be silicided. Then, a first RTA (Rapid Thermal Annealing) process is performed to form a first-reacted silicide region. Next, a supplemental silicon layer is formed over the entire surface; and a second RTA process is performed to form a second-reacted silicide region.

Description

[0001] The present invention relates to semiconductor fabrication technology, and more particularly to a semiconductor device that is fabricated using SALICIDE (Self Aligned Silicide) process.[0002] In recent years, semiconductor devices have been miniaturized and improved in performance, and at the same time, system LSIs have been proposed. In such a system LSI, for improving its performance, it is required to decrease resistance of a gate pattern and active regions of source and drain. As shown in "Semiconductor World", May 1998, page 66, salicide process has been used to decrease that resistance. Especially for SOI (Silicon-On-Insulator) type of devices, the salicide process is important. SOI technology has become increasingly important in the field of integrated circuits. In SOI fabrication, a layer of semiconductor material overlies an insulating layer, typically, a single crystal layer of silicon overlies a layer of silicon dioxide, which itself overlies a silicon substrate.[0...

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Benefits of technology

[0007] Accordingly, an object of the present invention is to improve quality of a semiconductor device even if a SOI layer is designed to be very thin.

[0010] The main feature of the present invention is to form the supplemental silicon layer over the entire surface prior to the second RTA process. According to the present invention, silicon for silicide process is also provided from the supplemental silicon layer in the second RTA process. As a result, low resistance wiring can be well realized by the salicide process even if an SOI layer is formed to be thinner. Consequently, the fabricated semiconductor device is prevented from having a problem of electrical leakage.

[0012] An impurity may be doped into the supplemental silicon layer before the second RTA process, wherein the impurity is of the same type as active regions. When such an impurity is doped into the supplemental silicon layer, the remaining (non-reacted) silicon can be removed at a high etching rate and high selectivity after the second RTA process. Further, the type of impurity is the same as that of the impurity doped into the corresponding active region, so that the silicide reaction progresses smoothly.

Problems solved by technology

As a result, undesirable electrical leakage is made.

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