Lead frame and semiconductor device using the same

a technology of lead frame and semiconductor device, applied in the direction of semiconductor device, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problem of easy separation and achieve the effect of preventing separation, high joining strength and preventing separation

Inactive Publication Date: 2005-01-13
YAMAHA CORP
View PDF0 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0014] It is an object of the invention to provide a lead frame and a semiconductor device, wherein bonding wires are not broken due to cracks unexpectedly formed in a molded resin in a heating step when the semiconductor device is mounted on a circuit board.
[0015] It is another object of the invention to provide a lead frame and a semiconductor device which can be manufactured at a high yield and therefore contribute to the protection of the environment.
[0016] A lead frame of this invention has a die stage for mounting a semiconductor chip thereon and is enclosed in a molded resin such that the semiconductor chip is adhered to the upper surface of the die stage, thus producing a semiconductor device, wherein the outline of the die stage is shaped to be smaller than the outline of the semiconductor chip, and a plurality of cutouts are formed on the respective sides of the die stage so as to reduce the overall area of the die stage.
[0018] The joined area between the die stage and the semiconductor chip that are firmly joined together is surrounded by the molded resin introduced into the cutouts of the die stage; therefore, it is possible to establish a firmly joined state between the semiconductor chip and the molded resin inside of the cutouts of the die stage. Hence, even when separation occurs in the boundary between the die stage and the molded resin, it does not extend towards the boundary between the semiconductor chip and the molded resin. That is, it is possible to prevent the separation from growing as cracks causing possible breaks of bonding wires. The aforementioned relationships defined between L1 and L2 and between S1 and S2 guarantee a high joining strength between the die stage and the semiconductor chip so as to prevent separation from occurring in the boundary between the semiconductor chip and the molded resin.
[0019] When the semiconductor device is installed in an electronic device, the aforementioned lead frame is joined with a circuit board by use of non-lead solder, which does not contain a toxic substance, thus contributing to the protection of the environment during manufacturing.

Problems solved by technology

However, when the semiconductor device 30 is joined to the circuit board by use of non-lead solder having a high melting point, separation may be easily caused due to heating.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Lead frame and semiconductor device using the same
  • Lead frame and semiconductor device using the same
  • Lead frame and semiconductor device using the same

Examples

Experimental program
Comparison scheme
Effect test

first embodiment

[0053] FIGS. 1 to 3 show a lead frame 1 and a semiconductor device 10 in accordance with the invention. The lead frame 1 is produced using a thin plate made of a prescribed metal such as Cu alloy and 42 alloy, which is subjected to etching and is then subjected to die pressing, so that it is formed in a prescribed shape. Specifically, the lead frame 1 comprises a die stage 2 in which a semiconductor chip 8 is mounted on the upper surface, a plurality of stays 4 for supporting the die stage 2, and a plurality of leads 5 that are arranged outside of the die stage 2 and are electrically connected with electrodes of the semiconductor chip 8.

[0054] The die stage 2 is formed in a prescribed shape to match the shape of the semiconductor chip 8. In the present embodiment, the die stage 2 as a whole is roughly formed in a rectangular shape to match the rectangular shape of the semiconductor chip 8 as shown in FIGS. 2 and 3.

[0055] The overall area of the die stage 2 is reduced so as to be sm...

second embodiment

[0092]FIGS. 12A and 12B show the lead frame 1 and the semiconductor device 10 in accordance with the invention, wherein in addition to the foregoing cutouts 3 that are formed at the centers of the respective sides of the die stage 2, secondary cutouts 3A are formed so as to encompass the cutouts 3 inwardly of the die stage 2 whose backside is subjected to half etching.

[0093] Each of the secondary cutouts 3A is opened with respect to the cutouts 3 and the backside of the die stage 2, wherein in the foregoing molding step, the molded resin 9 flows into the secondary cutouts 3A in addition to the cutouts 3 of the die stage 2.

[0094] The second embodiment can offer the same effects as demonstrated by the first embodiment. In addition, due to the formation of the secondary cutouts 3A, the overall adhered area is reduced in the same plane formed between the backside of the die stage 2 and the molded resin 9 so that the stress therein is dispersed; hence, it is possible to make it difficul...

third embodiment

[0096]FIGS. 13A and 13B show the lead frame 1 and the semiconductor device 10 in accordance with the invention, wherein the secondary cutouts 3A are formed by performing half etching on the upper surface of the die stage 2 so as to encompass the semicircular cutouts 3, which are formed at the centers of the respective sides of the die stage 2.

[0097] The secondary cutouts 3A are opened in the cutouts 3 on the upper surface of the die stage 2, wherein in the foregoing molding step, the molded resin 9 is introduced into the secondary cutouts 3A in addition to the cutouts 3, so that the molded resin 9 partially formed inside of the secondary cutouts 3 is joined to the backside of the semiconductor chip 8.

[0098] The third embodiment can demonstrate the same effects as offered in the first embodiment, wherein due to the formation of the secondary cutouts 3A, it is possible to increase the overall contact area between the semiconductor chip 8 and the molded resin 9. In addition, the secon...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A lead frame has a die stage for mounting a semiconductor chip whose electrodes are electrically connected with leads via bonding wires, wherein they are enclosed in a molded resin, thus producing a semiconductor device. The outline of the die stage is shaped so as to be smaller than the outline of the semiconductor chip, and a plurality of cutouts are formed in the peripheral portion of the die stage so as to reduce the overall area of the die stage and to enhance the adhesion between the die stage and molded resin. The length L2 of each cutout ranges from (L1×0.05) to (L1×0.20) where L1 denotes the length of each side of the die stage, and the overall area S2 of the die stage ranges from (S1×0.10) to (S1×0.40) where S1 denotes the overall area of the semiconductor chip.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] This invention relates to lead frames and semiconductor devices in which semiconductor chips mounted on lead frames are encapsulated in resins. [0003] This application claims priority based on Japanese Patent Application No. 2003-151378 and Japanese Patent Application No. 2004-133376, the contents of which are incorporated herein by reference. [0004] 2. Description of the Related Art [0005]FIGS. 19 and 20 show an example of a semiconductor device (designated by reference numeral ‘20’) encapsulated in a resin, and comprises a lead frame 11 made of a prescribed metal such as Cu alloy and 42 alloy, a semiconductor chip 18 that is joined with the upper surface of a die stage 12 of the lead frame 11 via a joining material 17 such as Ag paste and solder paste, a plurality of bonding wires 16 that electrically connect together electrodes of the semiconductor chip 18 and leads 15 of the lead frame 11, and a molded resin 19 ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L23/50H01L21/60H01L23/495
CPCH01L23/49503H01L2224/32014H01L2224/48091H01L2224/48247H01L2224/49171H01L2224/73265H01L2224/45144H01L2224/32245H01L24/48H01L24/49H01L2924/01079H01L2924/01078H01L2924/00014H01L2924/00H01L2224/451H01L24/45H01L2924/181H01L2224/05554H01L2224/32055H01L2224/05599H01L2924/00012A47J37/0694A47J37/067
InventorSHIRASAKA, KENICHIEGUCHI, HIROTAKA
OwnerYAMAHA CORP