Self diagnostic and repair in matrix display panel
a matrix display panel and self-diagnosis technology, applied in the field of matrix display panel self-diagnosis and repair, can solve the problems of reducing the production yield of the panel substantially, increasing the chances of production defects, and the cost of the display system, so as to achieve the effect of improving the effective yield
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example 1
[0040] According to a first exemplary embodiment of the invention, a spare column driver circuit 10 is provided for a block of column drivers 11, as shown in FIG. 2. Each column driver circuit 12 is relatively standard, having a data line register 1, a shadow register 2, digital comparator 3 and set-reset flip-flop 4, a voltage translator 5 and track-and-hold switch 6 as shown in FIG. 1. An input data bus 13 delivers the gray scale input data signal to each column driver circuit 12. The input data is stored in the line register 1 during the remainder of the line period. At the end of the line period, when all columns have been loaded with the proper gray scale input data, the data are transferred to the shadow register 2, controlled by global horizontal synchronization (Hsync) pulse 16. When the data from the shadow register 2 is equal to the value of global reference count 7, the digital comparator 3 clears the set-reset flip-flop 4, signifying the “end-of-tracking” or “hold” condi...
example 2
[0045]FIG. 3 shows a second exemplary embodiment of the invention. According to the second embodiment, a spare column driver circuit 30 is provided within a block of column drivers 31. The column drivers 32 are similar to the column driver circuits 12 described in Example 1, and shown in FIG. 1.
[0046] A data bus 34 delivers the data control signal to each column driver 32. A data clock 35, horizontal synchronization pulse 36, and shift register 37 generate the necessary address signal for each column driver circuit 32 to selectively read the appropriate data signal. The horizontal synchronization pulse 36 also provides an input to test scan controller 38. The output generated by each column driver 32 is (n:1) multiplexed onto a test line 39 by multiplexer circuits 40, and further (2:1) multiplexed by multiplexer circuits 41 with the output of an adjacent column driver 32 to a respective column drive line 42 of the column drive 32. A relatively simple comparator 47 is provided for e...
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