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Semiconductor wafer chuck assembly for a semiconductor processing device

a technology of semiconductor wafers and processing devices, applied in the direction of coatings, metallic material coating processes, chemical vapor deposition coatings, etc., can solve the problems of small integrated circuit elements and/or components, bad or defective integrated circuits, complex integrated circuits, etc., and achieve the effect of avoiding hot spots during wafer processing

Inactive Publication Date: 2005-02-10
LSI CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

"The patent describes a system, apparatus, and method for compensating for backside contamination on a semiconductor wafer during processing. This is achieved through a wafer chuck assembly that includes a wafer chuck body, a shield ring, and support pins. The assembly also includes a suction device for providing suction to the backside of the wafer chuck body. The technical effect of this invention is the ability to compensate for backside contamination, which helps to alleviate hot spots during wafer processing and provides a relatively planar processing surface for the wafer."

Problems solved by technology

As semiconductor technology advances, the complexity of integrated circuits increases.
This increased complexity typically results in smaller integrated circuit elements and / or components.
Problems in wafer processing or defects introduced during such wafer processing can result in bad or defective integrated circuits.
For various reasons, certain areas of the backside of the semiconductor wafer may become contaminated during one or more of the various processing steps (not including solvent and scrubber cleaning steps).
Particularly, various areas of the backside of the semiconductor wafer may have particle contamination after one or more wafer processing steps.
Such contamination may lead to or cause defects in wafer processing.
One such defect that can occur during photolithography processing of the semiconductor wafer is known as “hot spot.” Hot spot is induced by wafer backside contamination resulting from previous wafer processing.
Such defocusing due to hot spot can induce incomplete patterns for the formation of integrated circuit components, like short metal lines, broken metal lines, unlanded vias, and unlanded contact holes.
Because, production wafers typically have several previously printed mask patterns, it is difficult to visually detect hot spot.
Moreover, it is difficult to reduce or eliminate backside contamination during the various processing steps.

Method used

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  • Semiconductor wafer chuck assembly for a semiconductor processing device
  • Semiconductor wafer chuck assembly for a semiconductor processing device
  • Semiconductor wafer chuck assembly for a semiconductor processing device

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Embodiment Construction

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[0030] With reference now to FIG. 4, there is depicted a block diagram representation of an exemplary photolithography system for processing a semiconductor wafer, generally designated 40, that may utilize the present invention. It should be appreciated that the photolithography system 40 is representative of various semiconductor processing tools or devices that may utilize the present invention. Thus, while the present invention will be described in conjunction with a photolithography system, it should be understood that the present invention is applicable to other semiconductor wafer processing tools and / or devices.

[0031] As shown herein, the system 40 is a photolithography system for the photolithography processing of a semiconductor wafer (wafer) 42. The photolithography system 40 is composed of a photolithography tool 44 used for forming a layer of photoresist (not shown) as is known in the art on the wafer 42, an automatic process controller 48, and a stepper 46 for control...

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Abstract

A wafer chuck assembly for a semiconductor wafer processing device has axially movable wafer support pins associated with a wafer chuck body of the wafer chuck assembly. The wafer support pins are biased to contact and support the backside of a semiconductor wafer when the semiconductor wafer is placed and / or maintained (typically via air suction) on the wafer chuck assembly. Each support pin axially moves independent of one another such that any area of contamination on the backside of the semiconductor wafer that registers with a support pin, moves the affected support pin axially downwardly.

Description

BACKGROUND [0001] 1. Field of the Invention [0002] The subject invention relates generally to processing systems for semiconductor technology and, more specifically, to a semiconductor wafer processing chuck for semiconductor wafer processing tools. [0003] 2. Background Information [0004] Semiconductor devices such as integrated circuits (ICs) form at least part of almost every electronic product. As semiconductor technology advances, the complexity of integrated circuits increases. This increased complexity typically results in smaller integrated circuit elements and / or components. Because of the decrease in size of the circuit elements, the techniques for producing the circuit elements, and thus the integrated circuit itself, need to be quite precise. Problems in wafer processing or defects introduced during such wafer processing can result in bad or defective integrated circuits. [0005] The many semiconductor processing steps utilize various semiconductor processing tools. Such p...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/683H01L21/687
CPCH01L21/6838H01L21/6875H01L21/68742
Inventor OKUDA, MASAKAZU
Owner LSI CORP