Edge temperature compensation in thermal processing particularly useful for SOI wafers

a thermal processing and edge temperature compensation technology, applied in the field of thermal processing of semiconductor substrates and chambers, can solve the problems of crystallographic line defects, chips containing slip defects that are either inoperative or subject to early failure, and achieve the effect of less vertical structure and improving processing uniformity over tim

Inactive Publication Date: 2006-10-12
APPLIED MATERIALS INC
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0010] In a first aspect of the invention, a thermal processing method and apparatus in which a patterned production wafer is processed includes a retuning process and apparatus for improving the uniformity of processing over time. The retuning process may include thermally processing in the production chamber a reference wafer having a different pattern, for example, unpatterned and with less vertical structure, than production wafers according to at least part of the production process which has been optimized for the production wafers. A profile across the reference wafer is archived. For example, a measured radial thickness or temperature profile is measured and stored. After a number of production wafers have been processed in the production chamber, a monitor wafer is processed in that chamber according to the same part of the production process and the profile is remeasured and compared to the archived profile. The production recipe is adjusted accordingly.

Problems solved by technology

Variations in temperature of as little as 1° C. can cause a defect known as crystal slip, a crystallographic line defect that may extend for distances that may be visible.
Any chip containing a slip defect is either inoperative or subject to early failure.
The temperature control should be able to provide the required temperature uniformity of 1° C. at 1200° C. Nonetheless, SOI wafers have continued to exhibit unacceptable number of slip defects.
This solution however is felt to be inflexible since the extra ring needs to be optimized for the different combinations of silicon and oxide thicknesses.

Method used

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  • Edge temperature compensation in thermal processing particularly useful for SOI wafers
  • Edge temperature compensation in thermal processing particularly useful for SOI wafers
  • Edge temperature compensation in thermal processing particularly useful for SOI wafers

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Embodiment Construction

[0023] Although the invention is not limited by our understanding of its operation, we believe that the slip problem, particularly in semiconductor-on-insulator (SOI) wafers, in large part arises from the difference in emissivity between the narrow edge exclusion and the rest of the SOI wafer.

[0024] Before the apparatus and processes related to this invention are presented, it is important to understand a few of the principles that affect these types of processes. Three important material properties play a role in the way in body reacts when heated by optical radiation. These properties are:

[0025] 1. Absorptivity (α): For an object that is receiving heat by radiation, absorptivity is defined as the fraction of that total energy that is absorbed by it. For the same amount of heat radiation, an object with higher α will experience a faster temperature rise than one with lower absorptivity. If substantially all the radiation is absorbed in the object, then the differential temperatur...

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Abstract

A retuning process particularly useful with an Ar/H2 smoothing anneal by rapid thermal processing (RTP) of a silicon-on-insulator (SOI) wafer performed after cleavage. The smoothing anneal or other process is optimized including a radial temperature profile accounting for the edge ring and exclusion zone and the vertically structured SOI stack or other wafer gross structure. The optimized smoothing conditions are used to oxidize a bare silicon wafer and a reference thickness profile obtained from it is archived. After extended processing of complexly patterned production wafers, another bare wafer is oxidized and its monitor profile is compared to the reference profile, and the production process is adjusted accordingly. In another aspect, a jet of cooling gas is preferentially directed to the edge ring and peripheral portions of the supported SOI wafer to cool them relative to the inner wafer portions.

Description

RELATED APPLICATION [0001] This application claims benefit of provisional application 60 / 669,162, filed Apr. 6, 2005.FIELD OF THE INVENTION [0002] The invention relates to thermal processing of semiconductor substrates and chambers used therefor. In particular, the invention relates to rapid thermal processing of silicon-on-insulator wafers. BACKGROUND ART [0003] Rapid thermal processing (RTP) is a well known process used in the fabrication of semiconductor integrated circuits when it is desired to quickly raise a wafer or other substrate to a relatively high temperature required for a thermally activated process and to thereafter quickly cool the wafer. RTP chambers typically include an array of high-intensity incandescent lamps, often tungsten halogen lamps, which together with reflector cavities around the lamps direct high-intensity infra-red, visible, and near-ultraviolet radiation toward the wafer. The lamps can be quickly turned on and off, and wafer temperatures in excess of...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/66G01R31/26
CPCH01L22/20H01L22/12
Inventor CHACIN, JUANTALLAVAJULA, SAIRAJURAMAMURTHY, SUNDAR
Owner APPLIED MATERIALS INC
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