Methods of enabling polysilicon gate electrodes for high-k gate dielectrics

a polysilicon and dielectric technology, applied in the field of complementary transistors, can solve the problems of large shift in the choice of a material with the appropriate work function as the gate electrode is still a challenge, and the transistor vsub>t /sub>will shift larg
US20060263962A1Inactive Publication Date: 2006-11-23WEINER RONALD A
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
WEINER RONALD A
Publication Date
2006-11-23
Estimated Expiration
Not applicable · inactive patent

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Abstract

Complementary transistors and methods of forming the complementary transistors on a semiconductor assembly are described. The transistors are formed with an optional interfacial oxide, such as SiO2 or oxy-nitride, to overlay a semiconductor substrate which will be conductively doped for PMOS and NMOS regions. Then a dielectric possessing a high dielectric constant of least seven or greater (also referred to as a high-k dielectric) is deposited on the interfacial oxide. The high-k dielectric is covered with a thin monolayer of metal oxide (i.e., aluminum oxide, Al2O3) that is removed from the NMOS regions, but remains in the PMOS regions. The resulting NMOS transistor diffusion regions contain predominately metal to silicon bonds that create predominately Fermi level pinning near the valence band while the resulting PMOS transistor diffusion regions contain metal to silicon bonds that create predominately Fermi level pinning near the conduction band.
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Description

[0001] This application is a divisional to U.S. patent application Ser. No. 10 / 913,281, filed Aug. 6, 2004.FIELD OF THE INVENTION

[0002] This invention relates to semiconductor devices and fabrication processes thereof. The invention particularly relates to complementary transistors and a method to fabricate the complementary transistors that utilize transistor gate dielectric materials possessing a high dielectric constant. BACKGROUND OF THE INVENTION

[0003] Complementary Metal Oxide Semiconductor (CMOS) devices are dominated by n-channel (NMOS) and p-channel (PMOS) transistor structures. Various physical characteristics of each type of transistor determine the threshold voltage (Vt) that must be overcome to invert the channel region and cause a given transistor to conduct majority carriers (either by electrons movement in an NMOS device or by hole movement in a PMOS device).

[0004] One of the controlling physical characteristics is the work function of the material used to form th...

Claims

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