Methods of forming carbon-containing silicon epitaxial layers

Abstract

In a first aspect, a method is provided for forming an epitaxial layer stack on a substrate. The method includes (1) selecting a target carbon concentration for the epitaxial layer stack; (2) forming a carbon-containing silicon layer on the substrate, the carbon-containing silicon layer having at least one of an initial carbon concentration, a thickness and a deposition time selected based on the selected target carbon concentration; and (3) forming a non-carbon-containing silicon layer on the carbon-containing silicon layer prior to etching. Numerous other aspects are provided.

Description

[0001] The present application claims priority to U.S. Provisional Patent Application Ser. No. 60 / 834,773 filed Jul. 31, 2006, and entitled “METHODS OF FORMING CARBON-CONTAINING SILICON EPITAXIAL LAYERS” (Attorney Docket No. 10595 / L) which is hereby incorporated herein by reference in its entirety for all purposes. CROSS REFERENCE TO RELATED APPLICATIONS [0002] The present application is related to the following co-pending applications, each of which is hereby incorporated by reference herein in its entirety: [0003] U.S. patent application Ser. No. 11 / 001,774, filed Dec. 1, 2004 (Docket No. 9618); and [0004] U.S. patent application Ser. No. 11 / 227,974, filed Sep. 14, 2005 (Docket No. 9618 / P01).FIELD OF THE INVENTION [0005] The present invention relates to semiconductor device manufacturing, and more specifically to methods of forming carbon-containing silicon epitaxial layers. BACKGROUND [0006] As smaller transistors are manufactured, ultra shallow source / drain junctions are becomin...

AI Technical Summary

Benefits of technology

The patent describes a method for creating an epitaxial layer stack on a substrate with a specific carbon concentration. The method involves depositing layers of silicon with alternating carbon content and non-carbon content, based on the target carbon concentration. The resulting layer stack has improved properties and can be used for various applications such as semiconductor devices. The patent also provides a method for controlling the carbon concentration in the layer stack by using a cap layer. Overall, the invention provides a more precise and effective way to create high-quality epitaxial layer stacks.

Problems solved by technology

As smaller transistors are manufactured, ultra shallow source / drain junctions are becoming more challenging to produce.

Therefore, by changing the concentration of an etchant gas, the net selective process results in deposition of epitaxy material and limited, or no, deposition of polycrystalline material.

On the other hand, the ultra shallow source / drain junction inevitably results in increased series resistance.

Also, junction consumption during silicide formation increases the series resistance even further.

However, current selective epitaxy processes have some drawbacks.

Also, harmful over etching of substrate features may occur.

Such high temperatures are not desirable during a fabrication process due to thermal budget considerations and possible uncontrolled nitridation reactions to the substrate surface.

Furthermore, some epitaxial films and / or processes are prone to morphological deficiencies such as pitting or surface roughness in the films.

Finally, the process should result in a low defect film or film stack (e.g., with little pitting, dislocations, roughness, point defects, etc.).

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