Pixel layout structure for raising capability of detecting amorphous silicon residue defects and method for manufacturing the same

Abstract

Disclosed is a pixel layout structure capable of increasing the capability of detecting amorphous silicon (a-Si) residue defects and a method for manufacturing the same. Wherein, an a-Si dummy layer is disposed on either one side or both sides of each data line. The design of such an a-Si dummy layer is utilized, so that in an existing testing conditions (by making use of an existing automatic array tester in carrying out the test), in case that there exists an a-Si residue in a pixel, the pixel having defects can be detected through an enhanced capacitance coupling effect and an electron conduction effect. Therefore, through the application of the above-mentioned design, the capability of an automatic array tester can effectively be increased in detecting a defective pixel having a-Si residues.

Description

[0001]The current application is a divisional application of, and claims a priority to U.S. application Ser. No. 12 / 405,805 filed on Mar. 17, 2009.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a technology of detecting amorphous silicon (a-Si) residue defects in a process of manufacturing array substrate, and in particular to a pixel layout structure for raising the capability of detecting amorphous silicon residue defects and method for manufacturing the same.[0004]2. The Prior Arts[0005]In the process of manufacturing Liquid Crystal Display (LCD), the manufacturing of an entire display is achieved through a first section Array manufacturing process, an intermediate section Cell manufacturing process, and a last section Module manufacturing process. The Array manufacturing process includes at least five stages comprising a Gate Electrode (GE) forming stage, a Semiconductor Electrode (SE) forming stage, a Source & Drain Electrode (S...

AI Technical Summary

Benefits of technology

"The present invention provides a pixel layout structure and a method for manufacturing it, which can detect amorphous silicon residue defects. By adding a design of a-Si dummy layer and a transparent conductive layer, the structure can increase the capability of an automatic Array Tester in detecting the pixel defects caused by a-Si residues, thereby improving production yield and stability of panels. The structure can also reduce the repair loading in the subsequent Cell manufacturing process, preventing downgrading of panel quality due to bright spots and increasing revenue of sales of panels."

Problems solved by technology

When defects occur in a pixel, a voltage difference cannot be stably maintained between an upper substrate and a lower substrate to drive liquid crystal in producing optical rotations, so that the pixels on a planar display will present distributions of uncontrollable bright spots and dark spots or even gray spots, thus degrading the image display quality of a liquid crystal display.

For this reason, liquid crystal displays are subject to severe electrical property tests before they can be delivered to customers.

For an Array Testing, an a-Si residue means the pixel defects caused by certain drawbacks occurring in an a-Si layer manufacturing process, such as foreign materials before a-Si deposition, poor quality of a-Si layer development, and residue of a-Si etching etc., and that is also a major bottleneck affecting the yield rate of an Array manufacturing process.

For an ordinary testing capability, it would not be easy to detect the pixel defect caused by the a-Si residue in an Array manufacturing process in case that the residue area is less than ⅓ of a pixel area, therefore, some pixel residue defect could have originally had a chance of being detected and repaired to normal status in an Array manufacturing process, failing detection and repair would make the unrepair defect flow to a subsequent manufacturing process, such that the pixel defect can only be detected in a Cell manufacturing process and repaired to become a dark spot, even more, the defect would be remained and flow into the last Module manufacturing process to become a bright spot defect.

Furthermore, in case that an a-Si residue pixel defect is detected in a subsequent Cell manufacturing process instead of being detected and repaired in an Array manufacturing process, it would cause more loading to a Cell repair and cassette transportation.

In case that an a-Si residue pixel defect is not detected and repaired in both the Array manufacturing process and Cell manufacturing process, yet it is detected in a Module manufacturing process, these panels may not be repaired any more due to the bright spots defects formed by the a-Si residue in pixel, further resulting in downgraded panel products and increasing the risk of panel quality degradation.

Or even worse, in case that the produced panels having a-Si residue pixel defects are delivered to the customers without being detected and repaired in any stage of the Array manufacturing process, the Cell manufacturing process, and the Module manufacturing process, it would result in instability, unreliability of panel quality control, and putting the credibility of the entire panel quality control in question.

Images