Semiconductor device and method for fabricating the same
a semiconductor and semiconductor technology, applied in the field of semiconductor devices, can solve the problems of difficult use of gan hemt for semiconductor elements, relatively high withstanding characteristics, and remarkable reduction of drain current, and achieve the effect of reducing on resistan
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first embodiment
[0050]A MIS-type HEMT 1 as a semiconductor device using a GaN semiconductor material of a first embodiment of the invention will be explained in detail below with reference to the drawings.
[0051](Structure)
[0052]FIG. 1 is a section view showing a schematic structure of the MIS type HEMT 1 of the first embodiment. It is noted that FIG. 1 shows a cross-sectional structure when the MIS-type HEMT 1 is cut along a plane along a gate length direction (or referred to also as a channel length direction) and vertically to a supporting substrate 10.
[0053]As shown in FIG. 1, the MIS-type HEMT 1 has the supporting substrate 10, a carrier traveling layer 12 formed on the supporting substrate 10, a buffer layer 11 disposed between the supporting substrate 10 and the carrier traveling layer 12, a carrier supplying layer 13 formed on the carrier traveling layer 12, source and drain electrodes 22s and 22d disposed separately on the carrier supplying layer 13, a passivation film 14 covering the sourc...
first modified example
[0091]FIG. 4 shows a MIS-type HEMT 1A as a first modified example of the MIS-type HEMT 1 of the present embodiment. As it is apparent when FIG. 4 is compared with FIG. 1, the MIS-type HEMT 1 of the present embodiment is different from the MIS-type HEMT 1A of the modified example in that a sequence for forming the passivation film 14 and the gate insulating film 15 is switched. That is, the gate insulating film 15 is formed on the carrier supplying layer 13 on which the source and drain electrodes 22s and 22d are formed (first insulating film forming process), then the passivation film 14 is formed on the gate insulating film 15 (second insulating film forming process) and the aperture a14 (corresponds to the trench t15) that exposes the gate insulating film 15 is formed in the region where the gate electrode 21 is to be formed by patterning the passivation film 14 (aperture forming process).
[0092]While the process of forming the passivation film 14 has been the first insulating film...
second modified example
[0095]FIG. 5 shows a MIS-type HEMT 1B as a second modified example of the MIS-type HEMT 1 of the present embodiment. As it is apparent when FIG. 5 is compared with FIG. 1, the MIS-type HEMT 1 of the present embodiment is different from the MIS-type HEMT 1B of the modified example in that the multi-layer insulating film composed of the passivation film 14 and the gate insulating film 15 is replaced with a single insulating film 24.
[0096]The insulating film 24 is formed by using the same material with the gate insulating film 15 for example. A trench t24 that corresponds to the trench t15 in the MIS-type HEMT 1 is formed in the insulating film 24. This trench t24 may be formed by means of wet etching whose etchant concentration and etching time are controlled.
[0097]Even the MIS-type HEMT 1B having the modified structure as described above may have the same effect with the MIS-type HEMT 1 shown in FIG. 1.
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