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Package structure having embedded semiconductor component and fabrication method thereof

Inactive Publication Date: 2012-05-03
UNIMICRON TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0019]Accordingly, the present invention provides a package structure having an embedded semiconductor component and a fabrication method thereof so as to prevent warpage.
[0027]Therefore, before performing a built-up process to form a built-up structure, the present invention first embeds the chip in an encapsulant such that in the subsequent built-up process, the warpage of the built-up structure can be prevented through the bending resistance of the encapsulant.

Problems solved by technology

However, since the substrate 10 has an asymmetrical structure, it can easily deform due to an uneven force that causes the warpage of the overall structure, thus adversely affecting the electrical connection quality and reliability of the overall structure and reducing the product yield.
Further, since the package structure of FIG. 1A lacks the support of a core board, it results in an insufficient strength and easily causes the warpage of the overall structure.
As such the electrical connection quality of the package structure as well as the underfill process are adversely affected.
However, the laser process cannot be applied to a core board 19 with a thickness greater than 0.3 mm.
Although there is no thickness limitation for a cutting process using a milling cutter, the process is time-consuming and has low accuracy.

Method used

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  • Package structure having embedded semiconductor component and fabrication method thereof
  • Package structure having embedded semiconductor component and fabrication method thereof
  • Package structure having embedded semiconductor component and fabrication method thereof

Examples

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Embodiment Construction

[0031]The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparent to those in the art after reading this specification.

[0032]FIGS. 2A to 2F show a fabrication method of a package structure having an embedded semiconductor component according to the present invention.

[0033]Referring to FIG. 2A, a carrier board 2a having two opposite surfaces is provided. The carrier board 2a has a core layer 20, a first metal layer 21 formed on two opposite surfaces of the core layer 20, a release layer 22 formed on the first metal layer 21, and a second metal layer 23 formed on the release layer 22.

[0034]The core layer 20 can be made of an organic polymer material such as BT (Bismaleimide Triazine), or a CCL (copper clad laminates) substrate having two opposite surfaces each having a prepreg dielectric material disposed thereon (not shown in the drawing).

[0035]Referring to FIG. 2B, a patterning proc...

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PUM

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Abstract

A package structure having an embedded semiconductor component, includes: a chip having an active surface with electrode pads and an inactive surface opposite to the active surface; a first insulating protection layer having a chip mounting area for the chip to be mounted thereon via the active surface thereof; a plurality of connection columns disposed in the first insulating protection layer at positions corresponding to the electrode pads and electrically connected to the electrode pads via solder bumps; an encapsulant formed on one surface of the first insulating protection layer having the chip mounted thereon for encapsulating the chip; and a built-up structure formed on the other surface of the first insulating protection layer and the connection columns. Due to the bending resistance of the encapuslant, the warpage of the built-up structure is prevented.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates generally to package structures and fabrication methods thereof, and more particularly, to a package structure having an embedded semiconductor component and a fabrication method thereof.[0003]2. Description of Related Art[0004]Along with the rapid development of electronic industries, electronic products are becoming lighter, thinner, shorter and smaller and developed towards high integration and multi-function. To meet the requirement of high integration and miniaturization for package structures, a BGA substrate design is introduced into packaging substrates and further the packaging type is developed from wire bonding type or flip chip type to a type of embedding such as an IC semiconductor chip in a packaging substrate so as to reduce the size of the overall semiconductor device and improve the electrical performance thereof.[0005]On the other hand, single chip packaging types are bein...

Claims

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Application Information

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IPC IPC(8): H01L23/498H01L21/56
CPCH01L21/561H01L23/49816H01L21/568H01L23/3128H01L23/562H01L25/0655H01L2224/16225H01L2224/73204H01L2224/32225H01L21/563H01L21/58H01L2924/00H01L24/80H01L2924/12042H01L2924/14
Inventor HSU, SHIH-PINGTSAI, I-TA
Owner UNIMICRON TECH CORP
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