Unlock instant, AI-driven research and patent intelligence for your innovation.

Negative reference voltage generating circuit and system thereof

a reference voltage and generating circuit technology, applied in the field of negative reference voltage generating circuits, can solve the problems of additional errors, differential amplifier offsets are added, and further errors, and achieve the effect of simple circuit structure and high accuracy

Active Publication Date: 2016-07-14
POWERCHIP SEMICON MFG CORP
View PDF0 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The invention provides a negative reference voltage generating circuit and system with high accuracy and a simple circuit structure compared to conventional technology. The system includes a control circuit that uses a negative reference voltage or a negative power voltage outputted from the generating circuit as a reference voltage to reduce variations in the negative power voltage. Overall, the negative reference voltage generating circuit and system can generate a stable negative reference voltage with high accuracy.

Problems solved by technology

That is, the negative reference voltage is obtained from the positive reference voltage PVref, and thus in addition to the accuracy of the positive reference voltage PVref, some errors are added.
Therefore, further errors occur and an extra offset of the differential amplifier is added.
Therefore, an error of the generation and an error of voltage drop due to current subtraction are added.
Nevertheless, the BGR type positive reference voltage generating circuits of Comparative Examples 1 and 2 have the problem of being unable to generating the negative reference voltage.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Negative reference voltage generating circuit and system thereof
  • Negative reference voltage generating circuit and system thereof
  • Negative reference voltage generating circuit and system thereof

Examples

Experimental program
Comparison scheme
Effect test

embodiment 2

[0077]FIG. 2A is a circuit diagram showing a structure of the BGR type negative reference voltage generating circuit of Embodiment 2. The BGR type negative reference voltage generating circuit of Embodiment 2 is different from the BGR type negative reference voltage generating circuit of Embodiment 1 in the following aspects.

(1) a NPN type transistor Qc with diode connection is provided in place of the diode Dc.

(2) m NPN type transistors Q1-Qm respectively with diode connection are provided in place of the diodes D1-Dm.

[0078]FIG. 2B is a vertical cross-sectional view showing a triple well structure of the NPN type transistors Q1-Qm and Qc of the BGR type negative reference voltage generating circuit of FIG. 2A. Each of the NPN type transistors Q1-Qm and Qc has the structure as shown in FIG. 2B, for example. In FIG. 2B, an N type dopant, such as phosphorus, is implanted into the P type semiconductor substrate 10 to form the N well 11, and a P type dopant, such as boron, is implanted ...

embodiment 3

[0081]FIG. 3A is a circuit diagram showing a structural example of the differential amplifier 1, operated by a negative voltage, of Embodiment 3. In FIG. 3A, the differential amplifier 1 is an operational amplifier and includes MOS transistors M1-M8, a bias resistor Rbias, a phase compensation capacitor Cc, input terminals T1 and T2, and an output terminal T3. The positive power voltage terminal of the differential amplifier 1 is set to the ground voltage Vss (may also be the positive power voltage Vdd as shown in FIG. 1A or FIG. 2A). The differential amplifier 1 differentially amplifies a differential input voltage inputted to the non-inverting input terminal T1 and the inverting input terminal T2, and outputs the same from the output terminal T3. Here, Vss is the ground voltage and Vnn is a predetermined negative voltage.

[0082]The differential amplifier 1 used in Embodiment 1 and Embodiment 2 needs to be operated by the negative power voltage Vnn. The initial negative power voltag...

embodiment 4

[0084]FIG. 4 is a block diagram showing a structural example of a negative reference voltage generating system of Embodiment 4. The BGR type negative reference voltage generating circuit of Embodiment 1 or Embodiment 2 requires the negative power voltage Vim, which needs to be generated from the positive power voltage Vdd. In FIG. 4, the negative reference voltage generating system of Embodiment 4 includes a negative voltage generating circuit 71 and a BGR type negative reference voltage generating circuit 72 as described in Embodiment 1 or Embodiment 2, for example. Here, the negative voltage generating circuit 71 does not include an output voltage controller and can generate a negative voltage around −Vdd by a one-stage charge pump driven by the positive power voltage Vdd or a switched capacitor converter driven by the positive power voltage Vdd.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A negative reference voltage generating circuit generating a negative reference voltage is provided, including a differential amplifier, a first diode, second diodes, and a third resistor. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and is driven by a positive and a negative power voltages. The output terminal is connected with the non-inverting input terminal via a first resistor and connected with the inverting input terminal via a second resistor. The first diode includes a cathode connected with the non-inverting input terminal of the differential amplifier and an anode connected with a ground. The second diodes respectively include a cathode connected with a predetermined connection point and an anode connected with the ground, and are connected in parallel. The third resistor is connected between the connection point and the inverting input terminal of the differential amplifier.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of Japan application serial no. 2015-004352, filed on Jan. 13, 2015. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The invention relates to a negative reference voltage generating circuit that is, for example, used in a NOR type flash memory and generates a negative reference voltage, and a negative reference voltage generating system using the negative reference voltage generating circuit.[0004]2. Description of Related Art[0005]FIG. 7A and FIG. 7B are vertical cross-sectional views of a NOR type flash memory cell of Conventional Example 1, which show the voltage relationship required for performing Fowler-Nordheim programming / erasing operations at the maximum voltage of 18V or 10V. In FIG. 7A and FIG. 7B, 100 represents a semiconductor substr...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H02M3/156H02M3/07
CPCH02M3/156G05F3/267G11C5/147H02M3/07G11C16/30
Inventor ARAKAWA, HIDEKIITO, NOBUHIKOMAEDA, TERUAKI
Owner POWERCHIP SEMICON MFG CORP