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Memory structure with doping-induced leakage paths

a technology of memory structure and doping, applied in the direction of semiconductor device details, semiconductor/solid-state device details, instruments, etc., can solve problems such as not being satisfactory in all aspects

Pending Publication Date: 2022-09-22
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a new method for manufacturing an OTP NVM device using antifuse technology. The method includes steps of programming the device by applying a programming voltage to a gate to cause an avalanche breakdown of the gate, which shorts the gate to the source. The device has improved programming capabilities and is compatible with existing processes. The method also includes a layout view and a cross-sectional view of the semiconductor device, as well as a method for implantation and a method for programming the device after implantation. The technical effects of the patent text include improved programming capabilities, compatibility with existing processes, and improved reliability and security of the OTP NVM device.

Problems solved by technology

While conventional OTP NVM devices are generally adequate for their intended purposes, they are not satisfactory in all aspects.

Method used

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  • Memory structure with doping-induced leakage paths
  • Memory structure with doping-induced leakage paths
  • Memory structure with doping-induced leakage paths

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Embodiment Construction

[0013]The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and / or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0014]S...

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Abstract

The present disclosure provides semiconductor device and methods of forming the same. A semiconductor device according to the present disclosure includes a gate structure, a source / drain feature adjacent the gate structure, a dielectric layer disclosed over the gate structure and the source / drain feature, a gate contact disposed in the dielectric layer and over the gate structure, and a source / drain contact disposed in the dielectric layer and over the source / drain feature. The dielectric layer is doped with a dopant and the dopant includes germanium or tin.

Description

PRIORITY DATA[0001]This application is a continuation application of U.S. patent application Ser. No. 17 / 007,806, filed Aug. 31, 2020, the entirety of which is incorporated herein by reference.BACKGROUND[0002]Among semiconductor memory devices, non-volatile memory (NVM) devices can be used to store data even if power to the memory device is turned off. In various examples, NVM devices may include read only memory (ROM), magnetic memory, optical memory, or flash memory, among other types of NVM devices. NVM devices include multi-time programmable (MTP) memory devices, few-time programmable (FTP) memory devices, and one-time programmable (OTP) memory devices. As its name suggests, OTP NVM devices may only be successfully programmed once while MTP NVM devices may be successfully programmable multiple times. Compared to an MTP NVM device, an OTP NVM device has a simpler construction and a smaller footprint. OTP NVM devices are often used for embedded NVM applications because of their co...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G11C17/16H01L27/112H01L29/06H01L21/265H10B12/00
CPCG11C17/16H01L27/11206H01L29/0607H01L21/265H10B20/25H01L23/5252H01L23/485H01L21/76825
Inventor SU, HSIN-WENLIN, SHIH-HAOCHEN, JUI-LINHUNG, LIEN-JUNGWANG, PING-WEI
Owner TAIWAN SEMICON MFG CO LTD