Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof

a technology of semiconductor pellet and base substrate electrode, which is applied in the direction of semiconductor devices, semiconductor/solid-state device details, coatings, etc., can solve the problems of increasing the size of the semiconductor device as a whole, reducing the operating speed reducing the efficiency of the semiconductor device, so as to achieve the effect of increasing the connection strength between the bonding wire and the second electrode pad, increasing the young's modulus, and effective transmission of bonding force and ultrasonic vibration

Inactive Publication Date: 2010-08-10
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0028]Further, the rigid substrate has a higher Young's modulus than a flexible substrate; therefore, when the bonding pads arranged on the main surface of the semiconductor pellet and the second electrode pads arranged on the back of the base substrate are electrically connected by bonding wires, the bonding force applied to the second electrode pads can be prevented from being absorbed by the base substrate. This assures effective transmission of the bonding force and the ultrasonic vibrations to the second electrode pads. Thus, the connection strength between the bonding wires and the second electrode pads is increased, making it possible to prevent connection failure of the bonding wires and to enhance electric reliability of the semiconductor device.
[0029]Furthermore, the rigid substrate has a small inplane thermal expansion coefficient and a high Young's modulus compared with a flexible substrate, which means the rigid substrate is harder to bend. This prevents the base substrate from being deformed (warped or twisted) due to reflow heat produced during the process of mounting the semiconductor device on the mounting surface of the mounting board. This ensures a sufficient flatness of the back of the base substrate with respect to the mounting surface of the mounting board, thus enhancing the mounting precision of the semiconductor device.
[0030]According to the above-mentioned manufacturing method of this invention, the bonding pads of the semiconductor pellet and the first electrode pads of the base substrate are electrically connected through bonding wires and second electrode pads, so the through holes electrically connecting the second electrode pads and the first electrode pads can be eliminated, making it possible to use a base substrate reduced in external size by an amount corresponding to the occupied area of the through holes. This in turn allows the manufacture of reduced-size semiconductor devices.
[0031]Further, because the bonding pads of the

Problems solved by technology

Hence, there has been a problem that the external size of the base substrate 1 increase with the increasing number of the through-hole conductors 1C, which in turn increases the size of the semiconductor device as a whole.
There is also another problem which the inventors have considered.
This, in turn, increases

Method used

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  • Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof
  • Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof
  • Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof

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Experimental program
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embodiment 1

[0051]The outline construction of a semiconductor device, as a first embodiment of this invention, that uses the BGA structure is shown in FIG. 1 (plan view of the main surface side), FIG. 2 (cross section taken along the line A—A of FIG. 1), FIG. 3 (enlarged cross section of an essential part of FIG. 2) and FIG. 4 (enlarged plan view showing the back side of an essential part of the semiconductor device with the resin sealing body removed).

[0052]As shown in FIGS. 1, 2, 3 and 4, the semiconductor device has a semiconductor pellet 2 mounted on a pellet mounting area of the main surface of a base substrate 1, with a plurality of bump electrodes 4 arranged in grid on the back of the base substrate 1 opposite the main surface.

[0053]The base substrate 1 may be formed of a printed circuit board. The printed circuit board may, for example, have a structure in which wiring is formed over the surface of a rigid substrate of glass fiber impregnated with epoxy resin, polyimide resin or maleimi...

embodiment 2

[0103]The outline configuration of a semiconductor device as the second embodiment of this invention that employs a BGA structure is shown in FIG. 12 (cross section) and FIG. 13 (enlarged plan view of an essential part of the back side showing the state of the back side removed of the resin sealing body).

[0104]As shown in FIG. 12 and 13, the semiconductor device has the semiconductor pellet 2 mounted facedown on the pellet mounting area of the main surface of the base substrate 1 with an insulating layer 3 in between. A plurality of bump electrodes 4 are arranged in grid on the back of the base substrate 1.

[0105]Arranged in the central area of the main surface of the semiconductor pellet 2 along the longer sides thereof is a row of bonding pads 2A, which are electrically connected to the second electrode pads 1A arranged on the back of the base substrate 1 through the bonding wires 6 passing through the slits 5 formed in the base substrate 1. The second electrode pads 1A are electri...

embodiment 3

[0108]The outline configuration of a semiconductor device as the third embodiment of this invention that employs a BGA structure is shown in FIG. 14 (plan view of an essential part of the back side showing the state of the back side removed of the resin sealing body).

[0109]As shown in FIG. 14, the semiconductor device has a semiconductor pellet 2 mounted facedown on a pellet mounting area of the main surface of the base substrate 1, with an insulating layer 3 in between. Bump electrodes 4 are arranged in grid on the back of the base substrate 1.

[0110]At the outer periphery of the main surface of the semiconductor pellet 2, a plurality of bonding pads 2A are arranged along the sides of the pellet. At the central portion of the main surface of the semiconductor pellet 2, a plurality of bonding pads 2A are arranged along the longer or shorter side of the pellet. The bonding pads 2A are electrically connected to the second electrode pads 1A arranged on the back of the base substrate 1 b...

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Abstract

A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

Description

[0001]More than one reissue application has been filed for the reissue of U.S. Pat. No. 5,777,391. These reissue applications are Ser. No. 09 / 613,541, filed Jul. 7, 2000, Ser. No. 10 / 105,236, filed on Mar. 26, 2002, which is a continuation of Ser. No. 09 / 613,541, Ser. No. 11 / 182,039 filed on Jul. 15, 2005, which is a continuation of Ser. No. 10 / 105,236, the present application Ser. No. 11 / 182,040, also filed on Jul. 15, 2005, which is another continuation application of Ser. No. 10 / 105,236, Ser. No. 11 / 256,620, filed on Oct. 24, 2005, which is a Continuation of Ser. Nos. 11 / 182,039 and 11 / 182,040, Ser. No. 11 / 256,621, also filed on Oct. 24, 2005, which is also a continuation of Ser. Nos. 11 / 182,039 and 11 / 182,040, Ser. No. 11 / 285,730, filed on Nov. 23, 2005 which is a continuation of Ser. No. 11 / 182,039 and Ser. No. 11 / 182,040, and Ser. No. 11 / 285,729, filed on Nov. 23, 2005, which is also a continuation of Ser. No. 11 / 182,039 and Ser. No. 11 / 182,040, the subject matter of which are...

Claims

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Application Information

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IPC IPC(8): H01L23/48H01L21/00H01L23/52H01L21/44H01L21/60H01L23/12H01L23/13H01L23/31H01L23/498
CPCB29C45/14655H01L23/13H01L23/3128H01L23/49816H01L23/49827H01L24/05H01L24/06H01L24/32H01L24/48H01L24/49B29C45/0046B29C45/14836H01L24/29H01L24/45H01L2224/0401H01L2224/04042H01L2224/05556H01L2224/06135H01L2224/06136H01L2224/16H01L2224/32014H01L2224/32225H01L2224/45124H01L2224/45144H01L2224/45147H01L2224/45565H01L2224/4569H01L2224/48091H01L2224/48221H01L2224/48227H01L2224/48235H01L2224/4824H01L2224/48465H01L2224/48599H01L2224/48699H01L2224/49175H01L2224/73215H01L2224/73265H01L2224/85206H01L2224/85207H01L2224/92247H01L2924/01004H01L2924/01006H01L2924/01013H01L2924/01014H01L2924/01029H01L2924/0105H01L2924/01079H01L2924/01082H01L2924/15311H01L2924/18161H01L2924/18165H01L2924/30107H01L2924/01005H01L2924/01023H01L2924/01033H01L2924/01075H01L2924/0132H01L2924/1579H01L2224/29111H01L2224/2919H01L2224/48799H01L2224/05554H01L2924/00014H01L2924/00H01L2224/13111H01L2924/0695H01L2924/00012H01L2924/0665H01L2924/351H01L2924/181H01L24/73H01L2224/85399H01L2224/05599H01L21/60
Inventor NAKAMURA, ATSUSHINISHI, KUNIHIKO
Owner RENESAS ELECTRONICS CORP
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