6 results about "Drain efficiency" patented technology

The application discloses a high-efficiency broadband radio frequency power amplifier based on an open resonant ring and a design method thereof, and at least comprises a broadband input matching network, a transistor circuit and an output matching network, wherein the output matching network is provided with at least an open resonant ring second harmonic matching network and a broadband fundamental wave matching network, and the open resonant ring second harmonic matching network is composed of a two-port rectangular double-loop open resonant ring. By using the low-resistance characteristic of the open resonant ring in the stop band, the application can match the second harmonic at the output end, and the second harmonic matching and the fundamental wave matching are carried out separately, so that the second harmonic and the fundamental wave can be well matched to the optimal output impedance at the same time, thereby improving the drain efficiency and the working bandwidth.

The invention discloses an EF type radio frequency power amplifier circuit which comprises a transistor, an EF type matching network is connected between a drain electrode of the transistor and an output matching network, the EF type matching network comprises an E type matching network and multiple F type matching networks, and the multiple F type matching networks are used for controlling second harmonic impedance and third harmonic impedance. The multiple F-type matching network comprises a first parallel inductor, a second parallel capacitor and a series resonance network composed of the second parallel inductor and a third parallel capacitor, and the second parallel capacitor is connected with the series resonance network composed of the second parallel inductor and the third parallel capacitor in parallel and then connected with the first parallel inductor in series. A novel EF-type circuit is formed by innovatively combining an E-type matching network with multiple F-type matching networks. The high drain electrode efficiency can be achieved while the peak voltage swing at the two ends of the device is effectively controlled, the risk that the device is broken down is reduced, and meanwhile harmonic waves can be effectively restrained.

The application discloses an efficiency-enhanced two-stage driving stacked four-frequency multiplier, comprising a differential signal generating circuit, a quadrature signal generating circuit and a double-push frequency multiplier. The quadrature signal generating circuit avoids the use of a stage-to-stage balun, maximally reduces loss and improves the efficiency of the frequency multiplier. The double-push frequency multiplier adopts a series structure, a series resonance circuit is added to the input end of the first-stage double-push frequency multiplier, the output power of a transistor and the second-harmonic suppression capability are improved, the first stage is biased in A and B classes, and the source and the gate of the second-stage double-push frequency multiplier are driven. The stacked double-driving structure reduces the driving power required by the second stage to the first stage, realizes the improvement of transconductance, multiplexes current through stacking, reduces direct-current power consumption, and the second-stage double-push frequency multiplier is biased in C class, so that the output power and the drain efficiency are improved. The application has the characteristics of high drain efficiency, good harmonic suppression capability and output power.

The application relates to a design method of a wideband asymmetric quasi-balanced DPA with an enlarged backoff range, which comprises the following steps: establishing the architecture of the wideband asymmetric quasi-balanced DPA, establishing the equivalent circuit model of the wideband asymmetric quasi-balanced DPA, and obtaining the mathematical relationship between voltage and current; adopting a linear current model as an excitation signal to determine the load impedance, output power and drain efficiency under different normalized input levels; setting the load impedance of the main power amplifier and the auxiliary power amplifier to be equal when the output power is saturated, and obtaining the adjustable proportional coefficient of the loaded load; setting the voltage of the main power amplifier to be equal after the voltage saturation, and obtaining the relationship between the current ratio of the auxiliary power amplifier and the normalized input starting level; obtaining the relationship between the output power backoff ratio and the normalized input starting level; and optimizing the isolation port load of the output coupler and the direct current bias combination of the main power amplifier and the auxiliary power amplifier in the target working frequency band to meet the efficiency requirement under the set output power backoff ratio.

The application provides a semiconductor device and a preparation method thereof, and relates to the technical field of semiconductors. A first gate field plate electrically connected with a gate metal is added between a source field plate and a drain metal, and the first gate field plate is electrically connected with the gate metal through a resistor. In this way, the first gate field plate has a lower potential. On one hand, the first gate field plate can shield the electric field between the drain and the gate, and can further deplete the two-dimensional electron gas at the channel, so as to reduce the Cgd of the device, improve the gain and stability of the device, and avoid self-excitation of the device. On the other hand, the first gate field plate can shield the electric field between the drain and the source, reduce the Cds of the device, and thus improve the drain efficiency of the device.

The invention relates to a design method of a broadband asymmetric quasi-balanced DPA for expanding a rollback range. The design method comprises the following steps: establishing a framework of the broadband asymmetric quasi-balanced DPA, establishing an equivalent circuit model of the broadband asymmetric quasi-balanced DPA, and obtaining a mathematical relationship between voltage and current; a linear current model is adopted as an excitation signal, and load impedance, output power and drain efficiency under different normalized input levels are determined; setting the load impedance of the main power amplifier and the auxiliary power amplifier to be equal when the output power is saturated, and obtaining an adjustable proportionality coefficient of a loaded load; setting the voltage of the main power amplifier to be equal after being saturated, and obtaining a relation between a current ratio of the auxiliary power amplifier and the main power amplifier and a normalized input turn-on level; obtaining the relation between the output power back-off ratio and the normalized input turn-on level; and optimizing the isolation port load of the output coupler and the direct current bias combination of the main power amplifier and the auxiliary power amplifier at the target working frequency band so as to meet the efficiency requirement under the set output power rollback ratio.