Liquid crystal display array substrate and mfg. method thereof
A liquid crystal display and array substrate technology, applied in static indicators, instruments, nonlinear optics, etc., can solve the problems of display brightness decrease, easy reflection of light, affecting pixel display area, etc., and achieve increased light transmittance, layer number Reduction, the effect of impedance reduction
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Embodiment 1
[0039] Embodiment 1, please refer to Figure 1A and Figure 2A , Figure 1A for Figure 2A Schematic diagram of the cross-sectional structure of the AA tangent line of the middle signal line, the BB tangent line of the scan line, the CC tangent line of the capacitor line and the DD tangent line of the gate. Firstly, a first metal layer is formed on a transparent substrate (not shown), and then the first metal layer is defined to form the first scan lines 112 , the first signal lines 114 , the capacitor lines 116 and the gates 118 . exist Figure 2A Among them, the first scanning line 112 and the capacitance line 116 are parallel to each other, and the first scanning line 112 and the capacitance line 116 respectively have several intersection regions 119 . The first signal line 114 is perpendicular to the first scanning line 112 and the capacitance line 116, and the first signal line 114 is intermittently arranged on both sides of the crossing area 119 of the first scanning lin...
Embodiment 2
[0048] Embodiment 2. In this embodiment, the planar layer of Embodiment 1 is omitted, so some corresponding adjustments are also made to the partial structure of the array substrate of the liquid crystal display. In the second embodiment, except that the upper electrode is not formed on the capacitor dielectric layer when defining the second metal layer, the manufacturing process steps from the deposition of the first metal layer to the deposition of the protective layer are the same as the manufacturing process of the first embodiment The steps are the same, so they will not be repeated here.
[0049] Please refer to FIG. 3A and FIG. 3B at the same time. FIG. 3B is a top view of FIG. 3A .
[0050] After depositing the passivation layer, the passivation layer 150 is defined to cover the second scan lines 142 , the second signal lines 144 , the source electrodes 148 and the drain electrodes 149 . Afterwards, a transparent conductive layer is formed, and then the transparent co...
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