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Bus protocol analysis chip for servocontrol

A bus protocol and servo control technology, applied in the field of power-driven special-purpose chips, can solve the problems of high cost and complicated debugging, and achieve the effects of improved integration, high single-chip integration, and low debugging complexity.

Active Publication Date: 2009-02-25
KEDE NUMERICAL CONTROL CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

The problem is that multiple chips with independent functions are not only costly, but also complicated to debug

Method used

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  • Bus protocol analysis chip for servocontrol
  • Bus protocol analysis chip for servocontrol
  • Bus protocol analysis chip for servocontrol

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Embodiment Construction

[0018] Such as figure 2 The structure of the bus servo driver is shown, wherein the functional modules to be completed by the chip of the present invention are located in the frame marked GDS06C, mainly including bus protocol analysis function circuit, PLC interface circuit, incremental encoder and grating ruler module. Usually, the dedicated servo drive control part is realized by using DSP servo control or FPGA servo control.

[0019] module box image 3 Among them, GDS06C represents the chip of the present invention, including two bus protocol analysis modules, a parallel bus interface module, a PLC module, an encoder / grating ruler processing module, an encoder / grating ruler processing module, and multiple data forwarding modules. data register module.

[0020] 1. The bus protocol analysis module mainly analyzes information data according to specific communication protocols. Specifically, the speed, position and PLC control data sent by the master computer can be analyz...

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Abstract

The invention discloses a bus protocol analysis chip for servo control, including: two bus protocol analysis modules, used for exchanging information with PC through the physical layer control module, according to the communication protocol to analyze information data; a parallel bus interface module, used for exchanging information with the servo driver control part outside the chip; a PLC module, used for completing the PLC control input and output; an encoder / grating foot processing module, used for processing the incremental encoder signals; a number of data register modules, used for data storage in order to transmit the data among the modules. The ASIC of the invention has the features of high single-chip integration, simplified circuit design, low debug complexity, and low cost.

Description

technical field [0001] The invention relates to a chip used in a numerical control system, more specifically, to a special chip used in a servo drive in which an upper computer communicates with a servo drive control part to realize power drive. Background technique [0002] General digital bus servo system, such as figure 1 As shown, it should include the following parts: bus protocol analysis chip + servo drive control part + power drive part. The encoder feedback processing part needs to be set during closed-loop control. In the numerical control system, many switching points need to be controlled by PLC, so a PLC controller is also configured. Usually these parts are implemented by independent chips, and the on-board communication between each part is completed through the bus to realize servo control. The problem is that multiple chips with independent functions are not only costly, but also complicated to debug. Contents of the invention [0003] In view of the a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05B19/414
CPCY02P90/02
Inventor 于德海张赞秋李俊吴超王庆鹏顾晓亮曲永强
Owner KEDE NUMERICAL CONTROL CO LTD
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