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Integrated enhancement type and depletion type vertical bilateral diffusion metallic oxide field effect pipe

A vertical double-diffusion, field-effect transistor technology, applied in the manufacture of transistors, electrical components, semiconductor/solid-state devices, etc., can solve problems such as easy punch-through, and achieve the effects of good compatibility, cost reduction, and low manufacturing cost

Active Publication Date: 2009-02-25
SUZHOU POWERON IC DESIGN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, once the enhancement type and the depletion type vertical double-diffused MOSFET are integrated, punch-through phenomenon is easy to occur, so the isolation between the two is a problem that must be solved

Method used

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  • Integrated enhancement type and depletion type vertical bilateral diffusion metallic oxide field effect pipe

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Embodiment Construction

[0012] Below in conjunction with accompanying drawing, the present invention is described in detail, as figure 1 As shown, it includes a heavily doped N-type substrate 1, an N-type epitaxy 2 is arranged on the N-type substrate 1, and an enhanced vertical double-diffused metal oxide field effect transistor 6 and a depletion-type epitaxy are arranged on the N-type epitaxy. The vertical double diffused metal oxide field effect transistor 7 is further provided with an isolation structure between the enhanced vertical double diffused metal oxide field effect transistor 6 and the depletion type vertical double diffused metal oxide field effect transistor 7, the isolation structure It includes a floating P-type well 3 arranged on an N-type epitaxy 2 . The isolation structure further includes a silicon dioxide dielectric layer 4 and a polysilicon field plate 5 . The silicon dioxide dielectric layer 4 is disposed on the upper end of the floating P-type well 3 , and the polysilicon fie...

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PUM

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Abstract

The invention discloses an integrated enhancement-mode and depletion-mode vertical double diffusion metal oxide field effect tube, which comprises a heavily doped N-shaped substrate, a N-shaped extension equipped on the N-shaped substrate, an enhancement-mode vertical double diffusion metal oxide field effect tube and a depletion-mode vertical double diffusion metal oxide field effect tube equipped on the N-shaped extension, wherein an isolation structure is provided between the enhancement-mode vertical double diffusion metal oxide field effect tube and the depletion-mode vertical double diffusion metal oxide field effect tube. The isolation structure comprises floating P-shaped trap, a silicon dioxide dielectric layer and a polysilicon field plate, wherein the silicon dioxide dielectric layer is equipped on the upper end of the floating P-shaped trap, and the polysilicon field plate is equipped in the silicon dioxide dielectric layer. Comparing with the prior art, the invention uses an isolation structure to integrate the enhancement-mode vertical double diffusion metal oxide field effect tube and the depletion-mode vertical double diffusion metal oxide field effect tube on one chip, which is helpful for integration and miniaturization of system.

Description

technical field [0001] The invention relates to an integrated field effect transistor which integrates two kinds of vertical double-diffusion metal oxide field effect transistors of enhancement type and depletion type in one chip, which is suitable for switching power supply system. Background technique [0002] Mosfet high-voltage devices have the advantages of good switching characteristics and low power consumption. More importantly, metal-oxide-semiconductor high-voltage devices are easily compatible with standard low-voltage metal-oxide-semiconductor processes, reducing chip production costs. Metal-oxide-semiconductor high-voltage devices are developing in two directions: lateral metal-oxide-semiconductor high-voltage devices and vertical conductive metal-oxide-semiconductor high-voltage devices. Among them, the vertical double-diffused metal oxide field effect transistor transfers the drain region, drift region and channel region from the surface of the silicon wafer t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/088H01L21/76
Inventor 易扬波刘侠李海松
Owner SUZHOU POWERON IC DESIGN
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