Semiconductor device and manufacture method thereof
A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as high voltage, and achieve the effect of preventing deterioration
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no. 1 approach
[0094] Figure 5 ~ Figure 22 is a cross-sectional view during the manufacturing process of the semiconductor device according to the first embodiment of the present invention.
[0095] This semiconductor device is a planar FeRAM in which a contact region is provided on the lower electrode of a capacitor, and a voltage is applied to the lower electrode from a metal wiring above the contact region, and is fabricated as follows.
[0096] Initially, for Figure 5 The steps up to the cross-sectional structure shown in (a) will be described.
[0097] First, an element isolation insulating film 31 is formed by thermally oxidizing the surface of an n-type or p-type silicon (semiconductor) substrate 30, and an active region of a transistor is defined by the element isolation insulating film 31. This device isolation structure is called LOCOS (Local Oxidation Of Silicon: Local Oxidation of Silicon), but STI (Shallow Trench Isolation: Shallow Trench Isolation) can also be used instead....
no. 2 approach
[0239] In the first embodiment described above, a case where the present invention is applied to a planar FeRAM has been described. In contrast, in the present embodiment, the present invention is applied to a stacked FeRAM in which the lower electrode of the capacitor is directly connected to the conductive plug thereunder.
[0240] Figure 25 ~ Figure 32 It is a cross-sectional view during the manufacturing process of the semiconductor device according to the second embodiment of the present invention.
[0241] Initially, for Figure 25 The steps up to the cross-sectional structure shown in (a) will be described.
[0242] First, a groove for STI is formed on a silicon substrate 100, a silicon oxide film is buried in the groove as an element isolation insulating film 101, and an active region of the silicon substrate 100 is defined by the element isolation insulating film 101.
[0243] Next, boron is ion-implanted as a p-type impurity in the active region of the silicon su...
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