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Pixel with asymmetric transfer gate channel doping and method for manufacturing pixel

A pixel, channel technology, applied in radiation control devices, electrical components, diodes, etc., can solve the problem of incorrect reading of charge, leakage current, image lag, etc.

Active Publication Date: 2010-01-06
APTINA IMAGING CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This leakage will result in an incorrect reading of the amount of charge collected during the concentration period, thus degrading the image quality
[0008] Although the above structure is generally effective in reducing dark current by injecting dopants into the entire charge transport region to enhance the conductivity with respect to the substrate, this structure does not address the subsurface leakage current and the image lag issue

Method used

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  • Pixel with asymmetric transfer gate channel doping and method for manufacturing pixel
  • Pixel with asymmetric transfer gate channel doping and method for manufacturing pixel
  • Pixel with asymmetric transfer gate channel doping and method for manufacturing pixel

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Embodiment Construction

[0016] In the ensuing detailed description, reference is made to the accompanying drawings, which illustrate by way of example specific embodiments that may be employed in practicing the invention. In this regard, directional terms such as "top", "bottom", "front", "rear", "front", "rear", etc. are used to refer to the orientation of the figures being described. Because components of various embodiments of the present invention may be positioned in many different orientations, orientation terms are used for purposes of illustration and not limitation. It is to be understood that other embodiments may be utilized and structural and logical changes may be made without departing from the scope of the present invention. Therefore, the ensuing detailed description is not in a limiting sense, and the scope of the invention is defined by the appended claims.

[0017] figure 1 The schematic block diagram of FIG. 1 illustrates one embodiment of a CMOS pixel 30 employing asymmetric ch...

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Abstract

A pixel including a substrate of a first conductivity type, a photodetector of a second conductivity type that is opposite the first conductivity type and configured to convert incident light to a charge, a floating diffusion of the second conductivity, and a transfer region between the photodetector and floating diffusion. A gate is formed above the transfer region and partially overlaps the photodetector and is configured to transfer charge from the photodetector to the floating diffusion. A pinning layer of the first conductivity type extends at least across the photodetector from the gate. A channel region of the first conductivity type extends generally from a midpoint of the gate at least across the photodiode and is formed by an implant of a dopant of the first conductivity and having a concentration such that a dopant concentration of the transfer region is greater proximate to the photodetector than proximate to the floating diffusion.

Description

Background technique [0001] Digital cameras using a complementary metal-oxide-semiconductor (CMOS) image sensor with a 4-transistor pixel structure (which has buried gated diodes) typically provide better image quality than cameras using a 3-transistor CMOS image sensor because the buried The inset photodiode configuration reduces the amount of current generated at the surface, thereby reducing dark current, and also reduces noise because the transfer gate used to access the photodiode allows correlated double sampling to be used. However, as described below, dark current may be generated in pixel regions other than the photodiodes. [0002] A 4-transistor pixel typically includes a photodiode, a charge-to-voltage conversion region ("floating diffusion"), and a charge-transfer region. The photodiode and floating diffusion are built in a substrate (eg, silicon), and the charge transfer region is typically a MOSFET ("transfer gate") located between the diode and floating diffus...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/146H04N25/00
CPCH01L31/035281H01L29/66659H01L27/14643H01L27/14601H01L27/14603H01L27/14689H01L27/146
Inventor F·P·拉马斯特J·H·斯坦贝克C·P·帕尔苏尔T·E·邓甘
Owner APTINA IMAGING CORP