A clock adjustment algorithm based on minimum two multiplexing model

A least square method and clock adjustment technology, applied in the field of communication, can solve the problems of complex implementation, high cost, and high cost, and achieve the effect of ensuring accuracy

Inactive Publication Date: 2007-11-28
SHANGHAI SUSR TELECOM TECH
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Problems solved by technology

[0011] In order to solve the above two problems, one method is to use several different satellite clock systems such as: GPS system and GLONASS system for mutual comparison and verification to improve the accuracy and reliability of the clock. This method is complicated to implement and high in cost. One method is to use the GPS clock to synchronize the watch (atomic clock, crystal oscillator clock or CPU internal clock). During normal operation, the GPS clock is used to correct the watch. When the GPS is out of

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  • A clock adjustment algorithm based on minimum two multiplexing model
  • A clock adjustment algorithm based on minimum two multiplexing model
  • A clock adjustment algorithm based on minimum two multiplexing model

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[0032] Example

[0033] As shown in Figure 1, the clock synchronization device is a schematic diagram of the structure. The clock synchronization device is composed of a digital phase discrimination filter, a GPS receiver, a CPU, and a constant temperature high-stability crystal. The digital phase discrimination filter is connected to the GPS receiver, and the digital phase discrimination filter is connected to the GPS receiver. The phase detector filter is connected with the CPU and the constant temperature high stability crystal to form a loop. CPU: Rabbit2000, the performance is approximately equivalent to the 8051 series with 16M crystal oscillator.

[0034] As shown in Figure 2, it is a schematic block diagram of the structure of the digital phase discrimination filter. The present invention aims at the 1pps second pulse signal (or equivalent 1pps signal) provided by this low-cost GPS receiving module as an external reference comparison signal source , Utilize the output equi...

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Abstract

The invention discloses a clock modulating algorism based on minimum square law pattern, which comprises the following steps: building mathematical model of phase difference; adopting phase-detector result of front N s to control the frequency of high-stability crystal per s; reserving the phase-detector result as parameter of next second preestimation; compensating the accumulated phase difference through 2 delta phase-detector result; controlling the frequency fluctuation of high-stability crystal within little scale; affirming the output precision of clock.

Description

technical field [0001] The invention relates to a clock adjustment algorithm based on a least square method model, which can be used for clock equipment that provides a high-precision clock source by using a modified high-stable crystal method, and belongs to the technical field of communication. Background technique [0002] The digital synchronous network is the basis for the normal operation of the digital communication network, and it is also an important means to ensure the operation quality of various business networks. It is listed as the three supporting networks of the telecommunication network together with the telecommunication management network and the signaling network, and plays a pivotal role in the telecommunication network. [0003] For any communication device, a clock is required to provide its operating frequency, so the clock performance is an important aspect that affects the performance of the device. The clock is often referred to as the heart of th...

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Application Information

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IPC IPC(8): H04L7/00H04B7/26H04L12/24
Inventor 徐峻
Owner SHANGHAI SUSR TELECOM TECH
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