A programmable non volatile memory unit, array and its making method

A technology of memory cells and memory arrays, applied in the fields of programmable non-volatile memory cells, arrays and their manufacture, can solve the problems of reducing the reliability of logic devices and increasing costs, so as to avoid small size effects, reduce manufacturing costs and Power consumption, effects of avoiding parasitic effects

Active Publication Date: 2008-05-28
GIGADEVICE SEMICON (BEIJING) INC
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  • Abstract
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Problems solved by technology

Therefore, the use of programmable non-volatile memory cells based on fuse or anti-fuse manufacturing technology not only increases the cost of SOC,

Method used

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  • A programmable non volatile memory unit, array and its making method
  • A programmable non volatile memory unit, array and its making method
  • A programmable non volatile memory unit, array and its making method

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Embodiment Construction

[0041] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0042] In the semiconductor logic manufacturing process, in order to improve the performance of integrated circuits, it is necessary to use refractory metal silicide (Salicide) to reduce the parasitic resistance of the active area and polysilicon. Then, a layer of metal is deposited on the silicon surface and reacted with silicon to form a metal silicide; after the reaction is completed, the remaining metal is removed. Since the metal does not react with the insulating layer, it will not affect the performance of the insulating layer.

[0043] In the self-aligned refractory metal silicide manufacturing process, most of the active area and polysilicon of the large-scale integrated circuit are covered by low-resistance metal silicide. However, some areas, such as high-resistance polysilicon and easy-to-break-through active areas, require large par...

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Abstract

The invention discloses a programmable nonvolatile storage unit and an array, and the manufacturing method thereof. The device comprises a metal layer, a contact hole, a barrier layer, a plurality of polysilicons in the passive area, a plurality of polysilicons in the active area, and a substrate in the active area. A plurality of transistors are formed by the polysilicons in the active area and a substrate in the active area; a plurality of source lines are formed by the polysilicons in the passive area; A plurality of word lines are formed by the polysilicons in the passive area. A plurality of bit lines are formed by the metal lines in the metal layer. A capacitor is formed by connecting the metal layer, the connecting hole, the barrier layer, and the polisilicons in the passive area one by one. The storage unit is formed by means of corresponding series connection between the transistors and the capacitor and arrayed among the word-lines, the bit-lines and the source lines, which correspond to the storage unit. The invention improves the storage stability, decreases the area of the storage, and popularizes the application of VLSI.

Description

Technical field [0001] The present invention mainly relates to a semiconductor storage device, in particular to a programmable non-volatile memory cell, an array and a manufacturing method thereof. Background technique [0002] System on chip (SOC, System On Chip) manufacturing is mainly based on logic technology. In the process of SOC R&D and design, designers often need to integrate a large number of non-volatile memory cells inside the SOC. According to the different uses of the designed SOC, the designer selects a non-volatile storage unit of appropriate type and function as the internal storage unit of the SOC. [0003] Currently, non-volatile storage units include read-only non-volatile storage units, programmable read-only non-volatile storage units, programmable erasable read-only non-volatile storage units, and the like. Among them, the existing programmable non-volatile memory cell has the following shortcomings in its structure and design method: [0004] First of all,...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L23/522H01L21/8247H01L21/768
Inventor 朱一明胡洪
Owner GIGADEVICE SEMICON (BEIJING) INC
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