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52results about How to "Avoid parasitic effects" patented technology

Optoelectronic oscillator

ActiveCN104767102AImplement Stability ControlAchieve low phase noise performanceSolid masersResonant cavityOptoelectronics
The invention discloses an optoelectronic oscillator which comprises a laser device used for outputting optical carriers. The laser device is connected with an optoelectronic circulation circuit for forming an optoelectronic mixing resonant cavity. The optoelectronic oscillator further comprises an injection phase-locking module and a stable control module, the injection phase-locking module is used for injecting a locking signal to the optoelectronic circulation circuit to achieve side-mode suppression, and the stable control module is used for pilot control so as to compensate delay fluctuation of the optoelectronic circulation circuit. The injection phase-locking module is arranged to inject the locking signal to the optoelectronic circulation circuit to achieve side-mode suppression, the stable control module is arranged to extract delay fluctuation of all devices of the optoelectronic circulation circuit and carry out corresponding delay fluctuation compensation, so that the aim of stabilizing oscillation frequency is achieved, and therefore low-phase-noise single-mode stable output of the optoelectronic oscillator is achieved. Due to the fact that pilot control and circulating oscillation locked by injecting the locking signal are carried out in different frequency bands, mutual interference is avoided, and the parasitic effect of control circuit noise on an oscillation signal is effectively avoided.
Owner:台晶(重庆)电子有限公司

Top grid self-alignment thin-film transistor with source/drain areas raised and manufacturing method thereof

The invention provides a top grid self-alignment thin-film transistor with source/drain areas raised and a manufacturing method of the top grid self-alignment thin-film transistor with the source/drain areas raised. The manufacturing method includes the steps that an oxide semiconductor active layer, a grid dielectric layer and a grid electrode are sequentially formed on glass or a flexible substrate, and the thickness of the oxide semiconductor active layer is 5-20 nanometers in order to reduce influences of short-wavelength light on off-state characteristics of the thin-film transistor; then grid dielectric is corroded with the grid electrode as a stopping layer, the active layer corresponding to the grid dielectric is made to serve as a channel region, the active layers on the two sides are a source area and a drain area respectively, and self-alignment is achieved; next, low-resistivity conductive thin films are deposited, and the raised source area and the raised drain area are formed after photoetching, stripping or corrosion. The thin channels are adopted and the source area and the drain area are raised, not only are the influences of the light on the channels reduced, but also the resistance of the source area and the resistance of the drain area are reduced, and performance of the thin-film transistor is improved.
Owner:PEKING UNIV SHENZHEN GRADUATE SCHOOL

Ga2O3 Schottky diode device structure and manufacturing method thereof

The invention discloses a Ga2O3 Schottky diode device structure and a manufacturing method thereof, and mainly aims at solving the problems that a present Schottky diode device is low in reverse breakdown voltage and the parasitic capacitance in a field plate structure is high. The Ga2O3 Schottky diode device structure comprises a cathode electrode, a heavily-doped n type Ga2O3 substrate, a low-doped n type Ga2O3 epitaxial layer and an anode electrode from bottom to top; Schottky contact is formed in the part where the anode makes contact with the epitaxial layer, the cathode and the substrate make ohmic contact, grooves are distributed separately in the low-doped n type Ga2O3 epitaxial layer, intervals of grooves are increased progressively within the range of 0.3 to 0.5 micron, the first groove is positioned below the edge of the anode, the distance between the last groove and the first groove ranges from 10 to 15 micron, and AlGaO layers in which the Al component is greater than 20% are grown in an epitaxial manner in the grooves respectively. Thus, the reverse breakdown voltage is improved, the parasitic capacitance is reduced, positive characteristic is kept unchanged, and the structure and manufacturing method thereof can be used for high-speed integration circuits and microwave technologies.
Owner:XIDIAN UNIV

Power semiconductor package structure and manufacturing method thereof

A power semiconductor package structure includes a carrier, a first power chip, a second power chip, a first conductive sheet, a second conductive sheet and a third conductive sheet. The first power chip has a first surface and a second surface opposing to the first surface. A first control electrode and a first main power electrode are disposed on the first surface, and a second main power electrode is disposed on the second surface. The second surface is disposed on the carrier, and electrically connected to the carrier through the second main power electrode. The second power chip has a third surface and a fourth surface opposing to the third surface. A third main power electrode is disposed on the third surface, and a fourth main power electrode is disposed on the fourth surface. The fourth surface is disposed on the first power chip. The first conductive sheet is electrically connected to the first main power electrode and the fourth main power electrode. The second conductive sheet is electrically connected to the third main power electrode. The third conductive sheet is electrically connected to the first control electrode. At least a part of the first control electrode is non-covered by the second power chip along a projection direction, which is perpendicular to the carrier.
Owner:DELTA ELECTRONICS INC

Cylindrical sample preparation device for measuring moisture content of green sand through capacitance method and method for measuring moisture content of green sand

The invention discloses a cylindrical sample preparation device for measuring moisture content of green sand through a capacitance method and a method for measuring the moisture content of the green sand, belongs to the field of moisture measurement of cast green sand, and solves the problem that the measuring accuracy of the moisture content of the green sand through capacitance methods is low in the past. The method includes producing a sand sample with the height equal to a main sample drum through the sample preparation device; connecting two exciting electrode shielded wires with a parallel resistance model circuit respectively, exerting alternating current excitation voltage on two exciting electrodes through the two exciting electrode shielded wires, turning off a switch K, serially connecting a sand sample equivalent resistor Rx with a capacitor Cx, and turning on the switch K, parallelly connecting the sand sample equivalent resistor, the capacitor Cx and a first resistor R0; and measuring the voltage drop uo1 and uo2 of a second resistor R under the two states to obtain the Cx, and obtaining the moisture content of the green sand through the existing relation between capacitor Cx and the moisture content.
Owner:HARBIN UNIV OF SCI & TECH

Micro-mechanism testing probe card based on electroplating technique and manufacturing method thereof

The invention relates to a micro mechanical testing probe card based on electroplating process and a manufacturing method thereof, and is characterized in that, cantilevers and probe tips are manufactured and formed on a silicon wafer with electroplated metal nickel; the probe tips are manufactured on an (111) inclined surface of the silicon wafer, and each probe tip is connected with a ceramic substrate with one or two probe cantilevers; the probe cantilevers and the probe tips adopt an isostress beam structure; probes on an flip chip substrate are intensively arranged in two directions. The manufacturing is characterized in that: firstly, the upper surface of the (100) silicon wafer is taken as the electroplated working face, and the probe cantilevers of a low stress nickel layer is formed by electroplating; and then a deep groove (111) inclined surface produced by anisotropic etching is taken as the working face, and the probe tips of the low stress nickel layer is formed by electroplating, and then the probes are connected with a package substrate by a flip chip process, and finally the probe structure is released through a method of removing the corrosion of the silicon wafer.
Owner:深圳市道格特科技有限公司

Dielectrically isolated integrated circuit extending wafer and preparation method thereof

The invention mainly relates to a dielectric isolation epitaxial wafer and a preparation method thereof. The N-shaped / P-shaped dielectric isolation integrated circuit epitaxial wafer comprises N-shaped / P-shaped monocrystalline silicon (1) with backing material. A sandwich oxide layer (2) is arranged on the monocrystalline silicon (1). The invention is mainly characterized in that the dielectric isolation epitaxial wafer further comprises an N-shaped / P-shaped silicon epitaxial layer (6); a buried layer (3) is arranged in the silicon epitaxial layer (6); the silicon epitaxial layer (6) is divided into mutually-insulating isolation blocks by silicon dioxide (5), polysilicon (4) and the sandwich oxide layer (2). The invention also discloses a preparation method of the N-shaped / P-shaped dielectric isolation integrated circuit epitaxial wafer. The preparation method comprises the following steps: preparing a silicon chip on an insulating body, preparing the buried layer with low resistance, extending outwardly, notching, growing the silicon dioxide and the polysilicon, and polishing. Because the high temperature time is shortened greatly during the preparation, the invention has the advantages of more complete crystal structure and more accurate process control, and can be used for manufacturing circuits with high performance and special requirements.
Owner:TIANSHUI HUATIAN MICROELECTRONICS

Photoelectric detector based on asymmetric metamaterial structure

The invention discloses a photoelectric detector based on an asymmetric metamaterial structure. The photoelectric detector based on the asymmetric metamaterial structure can be composed of a metamaterial sensitive unit, and can also be composed of a plurality of metamaterial sensitive units in an array form. The metamaterial sensitive unit is composed of an asymmetric electromagnetic resonance structure and a conversion structure. During working, electromagnetic waves and the asymmetric electromagnetic resonance structure are coupled to generate a local high-intensity magnetic field, the conversion structure is arranged in the local high-intensity magnetic field, free carriers of the conversion structure deflect under the action of generated Lorentz force and have directional moving components, and then the free carriers are accumulated at the physical boundary of the conversion structure to form a direct-current potential difference; therefore, the conversion from the high-frequency electromagnetic wave (light) signal to the direct current is realized. The photoelectric detector provided by the invention has the outstanding advantages of simple structure, high detection speed, large response wave band range, low processing difficulty, low manufacturing cost and the like.
Owner:北京索通新动能科技有限公司 +1

Cylindrical sample preparation device for measuring moisture content of green sand through capacitance method and method for measuring moisture content of green sand

The invention discloses an application method for measuring the moisture content of the green sand through a capacitance method, belongs to the field of moisture measurement of cast green sand, and solves the problem that the measuring accuracy of the moisture content of the green sand through capacitance methods is low in the past. The method includes producing a sand sample with the height equal to a main sample drum through the sample preparation device; connecting two exciting electrode shielded wires with a parallel resistance model circuit respectively, exerting alternating current excitation voltage on two exciting electrodes through the two exciting electrode shielded wires, turning off a switch K, serially connecting a sand sample equivalent resistor Rx with a capacitor Cx, and turning on the switch K, parallelly connecting the sand sample equivalent resistor, the capacitor Cx and a first resistor R0; and measuring the voltage drop uo1 and uo2 of a second resistor R under the two states to obtain the Cx, and obtaining the moisture content of the green sand through the existing relation between capacitor Cx and the moisture content.
Owner:HARBIN UNIV OF SCI & TECH

Micro-mechanism testing probe card based on electroplating technique and manufacturing method thereof

The invention relates to a micro mechanical testing probe card based on electroplating process and a manufacturing method thereof, and is characterized in that, cantilevers and probe tips are manufactured and formed on a silicon wafer with electroplated metal nickel; the probe tips are manufactured on an (111) inclined surface of the silicon wafer, and each probe tip is connected with a ceramic substrate with one or two probe cantilevers; the probe cantilevers and the probe tips adopt an isostress beam structure; probes on an flip chip substrate are intensively arranged in two directions. The manufacturing is characterized in that: firstly, the upper surface of the (100) silicon wafer is taken as the electroplated working face, and the probe cantilevers of a low stress nickel layer is formed by electroplating; and then a deep groove (111) inclined surface produced by anisotropic etching is taken as the working face, and the probe tips of the low stress nickel layer is formed by electroplating, and then the probes are connected with a package substrate by a flip chip process, and finally the probe structure is released through a method of removing the corrosion of the silicon wafer.
Owner:深圳市道格特科技有限公司

Three-phase full-bridge module and manufacturing method thereof

The invention relates to a power device electronic module, and specifically relates to a three-phase full-bridge module and a manufacturing method thereof. The three-phase full-bridge module comprisesa first-phase bridge arm, a second-phase bridge arm, a third-phase bridge arm and a metal frame, wherein the first-phase bridge arm, the second phase-bridge arm and the third-phase bridge arm respectively comprise a first power device M1 and a second power device M2; in each phase bridge arm, the drain electrode of the first power device M1 is connected with the source electrode of the second power device M2 to form a connecting pin; the connecting pins of the first-phase bridge arm, the second-phase bridge arm and the third-phase bridge arm are respectively a connecting pin A1, a connectingpin A2 and a connecting pin A3; and the metal frame comprises a metal arm, and the metal arm connects the drain electrode of the second power device M2 of the first-phase bridge arm, the drain electrode of the second power device M2 of the second-phase bridge arm and the drain electrode of the second power device M2 of the third-phase bridge arm. The parasitic resistance and the parasitic capacitance can be suppressed according to the invention.
Owner:无锡电基集成科技有限公司
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