Top grid self-alignment thin-film transistor with source/drain areas raised and manufacturing method thereof

Abstract

The invention provides a top grid self-alignment thin-film transistor with source/drain areas raised and a manufacturing method of the top grid self-alignment thin-film transistor with the source/drain areas raised. The manufacturing method includes the steps that an oxide semiconductor active layer, a grid dielectric layer and a grid electrode are sequentially formed on glass or a flexible substrate, and the thickness of the oxide semiconductor active layer is 5-20 nanometers in order to reduce influences of short-wavelength light on off-state characteristics of the thin-film transistor; then grid dielectric is corroded with the grid electrode as a stopping layer, the active layer corresponding to the grid dielectric is made to serve as a channel region, the active layers on the two sides are a source area and a drain area respectively, and self-alignment is achieved; next, low-resistivity conductive thin films are deposited, and the raised source area and the raised drain area are formed after photoetching, stripping or corrosion. The thin channels are adopted and the source area and the drain area are raised, not only are the influences of the light on the channels reduced, but also the resistance of the source area and the resistance of the drain area are reduced, and performance of the thin-film transistor is improved.

Description

technical field [0001] The invention relates to a top-gate thin-film transistor and a manufacturing method thereof, in particular to a top-gate self-aligned thin-film transistor with raised source / drain regions, and mainly relates to a method for manufacturing raised source and drain regions. Background technique [0002] Thin film transistors, as switch control elements or integrated elements of peripheral drive circuits, are core devices in flat panel display technology. Currently widely used thin film transistors mainly include amorphous silicon thin film transistors and polysilicon thin film transistors. Amorphous silicon (a-Si) thin film transistors are widely used in driving circuits in flat panel displays or as switch control devices. However, the mobility of amorphous silicon is low, usually below 1cm 2 / V·S, the uniformity of polysilicon is relatively poor, the process is complex and costly, sensitive to visible light, and cannot work under visible light, and it i...

AI Technical Summary

Problems solved by technology

There are two main problems in bottom-gate thin-film transistors. One is the control of back channel etching (BCE). Etch protection layer (ES) is used to solve this problem, but the use of etch protection layer will increase the complexity of the process

Second, bottom-gate thin film transistors are not easy to achieve self-alignment, and there are compatibility issues between the back exposure technology and the current process, while the traditional manufacturing method will lead to a large overlap area in the bottom-gate thin film transistor, resulting in a large overlap capacitance , is not conducive to reducing the channel size, and

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