Method for manufacturing silicon-on-insulator silicon slice and floating body dynamic random access memory unit

Abstract

The invention provides a method for manufacturing a silicon-on-insulator silicon slice. The method includes the following steps that a silicon dioxide thin film and a substrate are formed in a first silicon slice; the first silicon slice is subjected to nitric oxide annealing process to form numerous dangling bonds at an interface position between the silicon dioxide thin film and the substrate; the first silicon slice is subjected to hydrogen ion implantation, a buried layer rich in hydrogen ions is formed in the substrate; a second silicon slice is bonded on the silicon dioxide thin film of the first silicon slice; and bonded silicon slices are subjected to thermal treatment, and the first silicon slice is stripped from the position of the buried layer rich in hydrogen ions to form the silicon-on-insulator silicon slice. By means of the technical scheme, a method for manufacturing a floating body effect memory unit on the silicon-on-insulator silicon slice and capable of improving the data retention performance is provided, interface dangling bonds between the silicon dioxide thin film and the substrate can be increased, thereby electrons can be effectively trapped, and the data retention performance of the floating body effect memory unit in a p-channel metal oxide semiconductor (PMOS) structure is improved.

Description

technical field [0001] The invention relates to a semiconductor fabrication technology, in particular to a fabrication method of a silicon-on-insulator silicon wafer, so as to improve the data retention time of a floating body dynamic random access memory unit. Background technique [0002] With the rapid development of integrated circuit technology, the degree of integration and technology allow more memories to be integrated on-chip. The area proportion of embedded memory in system-on-chip (SoC, System on Chip) has increased year by year, from an average of 20% of the chip area in 1999 to 60-70% in 2007 and even 90% in 2014. It can be seen that, The pros and cons of embedded memory will have more and more influence on the chip. Among them, dynamic random access memory (DRAM, Dynamic Random Access Memory) in embedded memory has the advantages of high speed, low power consumption, high density, etc. With the development of embedded dynamic memory technology, large-capacity ...

AI Technical Summary

Problems solved by technology

This is due to the floating body effect memory cells of the PMOS structure, when writing "1", such as figure 2 As shown, the carriers accumulated in the substrate are electrons 226. Since the effective mass of electrons is much smaller than that of holes, the mobility of electrons is greater than that of holes. Therefore, the electrons accumulated in the substrate are more likely to leak from the source, resulting in Performance degradation of FBC with PMOS structure in terms of data retention

[0011] In order to solve the above problems, it is necessary to improve the ability of FBC with PMOS structure to capture electrons, so that the data retention performance of FBC with PMOS structure can be improved. New method to solve the main problems faced when using FBC with PMOS structure

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