Wafer structure with buffer layer

Abstract

The invention discloses a wafer structure provided with a buffer layer, comprising a wafer which is provided with at least one welded gasket, wherein, a passivation layer is arranged on the wafer and exposes the welded gasket; the buffer layer is arranged on the passivation layer and the welded gasket; an under bump metallurgy (UBM) layer is arranged on the buffer layer. The buffer layer comprises a thickened inner buffer layer which is made of aluminum materials and is formed between the UBM layer and the welded gasket so as to strengthen the damping capacity of the wafer during the process of a drop test, thereby the phenomenon that a conductive lug which is used for being coupled with a substrate is dropped off and broken is avoided and the coupling ability of the conductive lug and the UBM layer can be strengthened. Moreover, the buffer layer can also comprise an outer buffer layer which is made of polyamide materials, arranged on the passivation layer and partially positioned between the UBM layer and the passivation layer.

Description

technical field [0001] The present invention relates to a wafer structure, and in particular to a wafer structure with a buffer layer, which is to add a buffer layer on the pad of the wafer to enhance the structural strength of the wafer and prevent conduction. The bump falls off, and the joining ability between the solder pad and the metal layer under the bump is strengthened. Background technique [0002] In the semiconductor packaging process, there are three commonly used methods: wire bonding, tap automated bonding and flip chip. In order to meet the requirements of today's electronic products, thin and short, It is necessary to continuously develop chips with small size and high number of pins. However, products packaged by wire bonding and tape-and-roll automatic bonding are not only relatively large in size, but also unable to meet the requirements of high number of pins. , Inverted crystal bonding has become a better choice. [0003] figure 1 shows a schematic di...

AI Technical Summary

Problems solved by technology

[0006] First: Since the conductive bumps disposed on the UBM layer 112 are usually made of lead-free solder balls, and the material of tin is generally hard and brittle, the shock absorption ability is poor during the drop test. , it is easy to cause lead-free solder balls to break

This problem will cause the wafer structure to have poor shock resistance characteristics, not have good resistance to external force, and be easily damaged by collision

[0007] Second: The conductive bumps used to electrically connect the wafer and the substrate are easy to fall off from the UBM layer 112, resulting in poor product yield during the flip-chip bonding process

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