Semiconductor device logic circuit

Abstract

The invention discloses a logic circuit of a semiconductor device, in the structure of the semiconductor device, primary charged ions in a grid channel layer and in a source electrode and a drain electrode have the same forms. The grid channel layer can be separated from the source electrode and the drain electrode which are arranged on both sides of the grid channel layer without relying on PN junctions, the electric field effect of an external operation voltage can be more effectively utilized, the widely-ranged ion doping density and the dielectric layer thickness can be used. The required saturation current can be obtained while the voltage is reduced, which is adaptable to the production of smaller logic circuits of the semiconductor devices, with higher density.

Description

Technical field [0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a basic structure and operating principle of a metal oxide semiconductor (MOS) device and a logic circuit composed of it. Background technique [0002] In the MOS device structure in the logic circuit of a traditional semiconductor device, the dopants of the gate channel layer and the dopants of the source and drain on both sides are different types of charged ions. Please refer to Handbook of Semiconductor Manufacturing Technology. Edited by YoshioNishi and Robert Doering, publisher Marcel Dekker, Inc.in 2000. Chapter 5, by Robert B. Simonton, Walter Class, Yuri Erokhin, Michael Mack, and Leonard Rubin. figure 1 It is a schematic diagram of the structure of a prior art semiconductor device. Such as figure 1 In the semiconductor device 100 shown, an isolation shallow trench 102, a P-well 103 and an N-well 104 are sequentially formed on a semicon...

AI Technical Summary

Problems solved by technology

For traditional MOS semiconductor devices with ion depletion regions on three sides, the available space decreases rapidly, and the saturation current cannot reach the expected value when the applied voltage is reduced.

Images