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Method and platform for making high-tension film

A high-tensile, thin-film technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of long time, limited efficiency and effect, and the thickness of high-tensile stress thin film 26 to achieve the effect of simplifying the process

Active Publication Date: 2012-01-11
UNITED MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the ultraviolet curing process takes a long time, and its efficiency and effect are limited by the thickness of the high tensile stress film 26

Method used

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  • Method and platform for making high-tension film
  • Method and platform for making high-tension film
  • Method and platform for making high-tension film

Examples

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Embodiment Construction

[0032] see Figure 2 to Figure 4 , Figure 2 to Figure 4 It is a schematic diagram of a first preferred embodiment of the method for manufacturing a high-tensile film provided by the present invention, for example, a polysilicon film. Such as figure 2 As shown, firstly, a substrate 30 is provided, such as a silicon wafer or a silicon-covered insulating substrate, and the substrate 30 includes at least one transistor, such as a gate structure 32 of an NMOS transistor. The gate structure 32 includes a gate dielectric layer 34 and a gate 36 on the gate dielectric layer 34 . A cap layer 38 is formed on the top of the gate 36 ; and an ONO offset spacer 40 is formed on the sidewall of the gate structure 32 . The gate dielectric layer 34 can be made of silicon oxide or silicon nitride compound formed by thermal oxidation or deposition; and the capping layer 38 can be made of a silicon nitride layer for protecting the gate 36 . In addition, a shallow trench isolation 44 is dispos...

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Abstract

The invention discloses a method for producing a polysilicon stress layer, a method for producing an etch stop layer of a contact hole and a method for producing a high tension film. The invention also discloses ultra violate rapid thermal process equipment. The method for producing the high tension film comprises the steps as follows: a substrate provided with at least one transistor formed on the surface thereof is provided, the polysilicon stress layer is formed on the surface of the substrate and an ultra violate rapid thermal process (UVRTP) is carried out to harden the polysilicon stress layer and the stress of the polysilicon stress layer is adjusted as the high tension film. A film with high tensile stress can be formed within a relatively short technical time or at relatively lowtemperature as the tensile stress state of the high tension film is adjusted by combining the energy of photon and heat energy.

Description

technical field [0001] The invention relates to a manufacturing method of a high tension film, in particular to a method for forming a high tension film on a strained-silicon metal-oxide-semiconductor transistor. Background technique [0002] With the narrowing of the semiconductor process line width to below 65 nanometers (nm) and the development of component miniaturization, how to improve the performance of components and increase the carrier mobility and drive current of metal oxide semiconductor (MOS) transistor components has become a major issue in semiconductors. A major issue in the industry. In order to increase the speed of MOS transistors, the industry has developed a "strained-silicon technology" and regards it as the main way to increase the speed of transistors. The main principle of strained silicon technology is to strain the silicon lattice below the gate, that is, the channel region (channel region), to reduce the resistance encountered by electrons when ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/31H01L21/3105
Inventor 廖秀莲陈能国蔡腾群陈意维
Owner UNITED MICROELECTRONICS CORP