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Metal plate type novel semiconductor packaging method

A metal plate, packaging method technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices and other directions, can solve problems such as affecting product reliability, easy to shake, affecting welding performance, etc. The effect of stability, enhanced reliability and reduced development cost

Inactive Publication Date: 2008-12-31
JCET GROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] 2. The lead frame after penetrating etching is easy to shake during the wire bonding process due to the low strength of the frame structure, which in turn affects the stability of the wire bonding interconnection and buryes hidden worries for the reliability of the product
[0005] 3. Although a special adhesive tape is used to prevent overflow during encapsulation, it will still break through the bonding surface due to the problem of pouring pressure when pouring the plastic sealant, resulting in overflow on the back of the frame
Therefore, in order to reduce the overflow area, a lower pouring pressure is often used, which in turn causes the molding compound to be too loose and has high water absorption, which affects the reliability of the product
[0006] 4. Due to the use of special tape, chemical substances will be emitted from the tape to pollute the surface of the chip and frame during operation, which will affect the subsequent chip loading and wiring operations
[0007] 5. When the tape is removed after encapsulation, due to the stickiness of the tape, there will be sticky substances remaining on the pins on the back of the lead frame, which will affect the soldering performance of the subsequent surface mount

Method used

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  • Metal plate type novel semiconductor packaging method
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Embodiment Construction

[0031] The metal flat plate type new semiconductor packaging method of the present invention mainly includes the following process steps:

[0032] ——Take a piece of metal plate 1, as shown in Figure 1,

[0033] ——Plating a metal layer 2 on the front and back sides of the metal plate 1, as shown in Figure 2,

[0034] ——Use physical punching or chemical etching to separate the whole piece of metal plate into individual block-shaped functional pins 3 and chip carrier base 4, and classify and package them according to the shape of the block for use. As shown in Figure 3.

[0035] ——Take a piece of metal flat plate 5, as shown in Figure 4.

[0036] ——Implant the pre-prepared block-shaped functional pins 3 and the bonding material 6 (special glue) for the chip carrier bottom 4 into the corresponding grooves on the metal plate 5, as shown in Fig. 5,

[0037] ——Implant a passive component 10 on the functional pin 3 plated with a metal layer. The passive component 10 is a resistor, a capac...

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Abstract

The invention relates to a novel encapsulating method for metal flat plate type novel semiconductor, which is mainly used for four-face footless flat patch-typed encapsulating of semiconductors. The method comprises the technological steps as follows: a metal plate is taken; metal layers are coated on the front face and the reverse face of the metal plate; the whole metal plate is separated into individual block-shaped functional pins and chip bearing bases; a metal flat plate is taken; the prepared block-shaped functional pins and the chip bearing bases are respectively implanted into corresponding grooves on the metal plate by an adhesive material; driven elements and chips are implanted on the functional pins and the chip bearing bases; a metal wire beating operation is carried out to the semi-finished products which are implanted with chips; the front faces of the semi-finished products after wire beating are encapsulated by a plastic sealing body and a consolidation operation after the encapsulating of the plastic sealing body is carried out; the metal flat plates at the reverse face of the semi-finished products are removed after printing; the semi-finished products are subjected to a separating operation for forming individual semiconductor encapsulated elements. The method of the invention has lower cost in materials, no chemical substance pollution and better reliability.

Description

(1) Technical field [0001] The invention relates to a semiconductor packaging method, which is mainly used for four-sided leadless flat chip packaging of semiconductors. It belongs to the field of semiconductor packaging technology. (2) Background technology [0002] The traditional four-sided leadless flat chip package uses semiconductor packaging methods such as chip mounting, wire bonding, and encapsulation on the basis of the through-etched entire frame. This type of semiconductor packaging based on the through-etched entire frame mainly has the following shortcomings: [0003] 1. Because the frame is through-etched, it is necessary to stick a special tape on the back of the entire frame to avoid the problem of plastic packaging material flash during the semiconductor encapsulation process, which in turn increases the material cost. [0004] 2. The lead frame after penetrating etching is prone to shaking due to the low strength of the frame structure during the wire bonding p...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L21/60H01L21/56
CPCH01L24/97H01L21/6835H01L2224/451H01L2224/48H01L2224/48091H01L2224/48247H01L2224/484H01L2224/97H01L2924/01082H01L2924/181H01L2924/30107
Inventor 王新潮于燮康罗宏伟梁志忠
Owner JCET GROUP CO LTD