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Method for wafer back flattening and method for enhancing wire width consistency of photo-etching process

A planarization and consistency technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problem of non-selective planarization, etc., and achieve the effect of satisfying the flatness of the back surface

Inactive Publication Date: 2010-12-22
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although the thickness of the back of the semiconductor wafer can be controlled more accurately by etching with corrosive liquid, however, since the corrosive liquid etches the entire back of the semiconductor wafer at the same time, it is impossible to selectively planarize the area where the flatness of the semiconductor wafer does not meet the requirements.

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  • Method for wafer back flattening and method for enhancing wire width consistency of photo-etching process
  • Method for wafer back flattening and method for enhancing wire width consistency of photo-etching process
  • Method for wafer back flattening and method for enhancing wire width consistency of photo-etching process

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Embodiment Construction

[0049] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0050]The manufacturing process of semiconductor integrated circuits is the process of forming semiconductor devices on semiconductor wafers formed of silicon or other semiconductor materials through a series of processes such as photolithography, etching, deposition, and planarization. Due to the high requirements on the flatness of the semiconductor wafer in the photolithography process, it is necessary to provide a bare chip with a high flatness, especially with the continuous improvement of the resolution of the photolithography process, the depth of focus (Depth Of Focus, DOF) Smaller and smaller, higher requirements for flatness are also put forward. The surface of the semiconductor wafer has a high flatness, which can not only improve the stability of the process at a small depth of focus, but also improve the control ability of the...

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Abstract

Disclosed is a method for smoothing the back surface of a chip, the steps of the method comprise providing a semiconductor chip, measuring the flatness of the back surface of the semiconductor chip, determining areas of which the flatness of the back surface of the semiconductor chip does not meet requirements, calculating the value of the thickness of the area needing to be removed to enable theflatness of the area to meet the requirements, and removing materials of which the thickness of the area of the back surface of the semiconductor chip does not meet the requirements of the flatness. The invention further provides a method for increasing the consistency of the line width of photoetching technology. The invention can selectively flat the area of the semiconductor chip which does not meet the requirements of the flatness.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer backside (WaferBackside) planarization method and a method for improving line width consistency of a photolithography process. Background technique [0002] With the increasing progress of the manufacturing process of semiconductor integrated circuits, the line width is getting smaller and smaller, and the process window of the lithography process is also getting smaller and smaller, which brings greater difficulties to the maintenance of the lithography process and also improves the reliability of semiconductors. Wafer flatness requirements. [0003] In the semiconductor integrated circuit manufacturing process, the semiconductor wafer is cut from a single crystal silicon ingot; after cutting, it needs to be polished to form a semiconductor wafer (bare wafer, Bare Wafer) with high flatness. Then, through a series of manufacturing processes such as ph...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/308H01L21/66H01L21/3065H01L21/027
Inventor 杨光宇
Owner SEMICON MFG INT (SHANGHAI) CORP