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Comparison device and analog-to-digital converter using the same

A comparison device and comparator technology, applied in the direction of analog/digital conversion calibration/test, analog/digital conversion, code conversion, etc., can solve the problem of slow time to reach the steady state operation state, achieve short stabilization time and smallest size Minimize and eliminate the effect of offset voltage

Inactive Publication Date: 2009-07-08
IND TECH RES INST
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this calibration technique is statistically based, requires an input signal that conforms to an invariant statistic, and has a slow time to steady-state operation

Method used

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  • Comparison device and analog-to-digital converter using the same
  • Comparison device and analog-to-digital converter using the same
  • Comparison device and analog-to-digital converter using the same

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Embodiment Construction

[0054] Figure 3A for an input signal with the same V IN and reference voltage V REF The circuit diagram of the two comparators. Figure 3B is a schematic diagram of the influence of the output signal of the comparator with offset voltage on the input signal. Please refer to Figure 3A and 3B , comparators 310 and 320 have different offset voltages V S1 and V S2 , that is to say the threshold voltage V of the comparator 310 T1 Equal to (V REF +V S1 ), and the threshold voltage of comparator 320 is equal to (V REF +V S2 ). Here it is assumed that the threshold voltage V T1 greater than the critical voltage V T2 . If the input signal V IN greater than (V REF +V S1 ), the output signal C1 of the comparator 310 has a logic high level (“1”), and the output signal C2 of the comparator 320 is also the same. If the input signal V IN less than (V REF +V S2 ), the output signal C1 of the comparator 310 has a logic low level (“−1”), and the output signal C2 of the co...

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Abstract

The present invention relates to a comparison device and a digital analog converter used the same, which includes a first and second comparators, a chop switching unit, a delta-sigma modulation unit, and a first and second compensation units. The chop switching unit transmits a first and a second signals to two input terminals of the first comparator during a first period, and inverses the first and second signals during a second period. The delta-sigma modulation unit compares the comparison results of two parallel comparators and generates the digital control codes for the comparators with the awareness of the chop switching unit. The first and the second compensation units adjust the threshold voltages of the comparators according to the digital control codes and a step size for calibrating the offset voltages of two comparators.

Description

technical field [0001] The present invention relates to a comparison device and an analog-to-digital converter using the same, which is an adaptive background calibration device. Background technique [0002] With the continuous increase of the communication network bandwidth, the conversion rate of the front-end analog-to-digital converter (ADC) must be continuously increased to meet the requirements of the overall system. A flash ADC (flash ADC) is the architecture of the ADC most commonly used to implement high-speed sampling. figure 1 Circuit diagram for a flash analog-to-digital converter. Please refer to figure 1 , the flash ADC 100 includes 2N-1 comparators for comparing the sampled signal Vi with different reference voltages Vr, and the flash ADC also includes an encoder 110 that performs bubble prevention ( bubble prevention) and convert the temperature code (thermal code) into binary code. The inherent limitations of the flash ADC 100 include process variation ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/10
CPCH03M1/1019H03K5/24H03M1/362
Inventor 刘文博鲜思康仇云
Owner IND TECH RES INST
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