Lamination type piezoresistor network and making method thereof

Abstract

The invention provides a lamination type piezoresistor network and a making method thereof, belonging to the field of electric elements. The lamination type piezoresistor network comprises a lower dielectric layer, a plurality of piezoresistor units, end electrodes and an upper dielectric layer, wherein the piezoresistor units are formed on the lower dielectric layer and mutually independent; the end electrodes are connected to both end parts of the piezoresistor units; the upper dielectric layer is combined with the lower dielectric layer attached by the piezoresistor units; and a piezoresistor further comprises an inner electrode attached on the lower dielectric layer and a piezoresistor film covered on the inner electrode. The lamination type piezoresistor network integrates the independent piezoresistor units into a whole, is convenient to use on the aspect of multiline overvoltage protection, enhances the installation density and the installation efficiency of the elements, reduces the integral machine cost and realizes the miniaturization.

Description

technical field [0001] The invention belongs to the field of electronic components, in particular to a laminated chip varistor network and a manufacturing method thereof. Background technique [0002] Transient voltage, surge voltage and electrostatic discharge (Electro-Static Discharge, ESD) damage to integrated circuits and semiconductor devices are well known, that is, semiconductor devices are very sensitive to voltage and current surges, even if 10 -6 The magnitude of electrostatic noise may also cause damage or failure of components and circuits. In recent years, the low-voltage development trend of integrated circuits and semiconductor devices is obvious, especially the development of low-voltage handheld electronic products makes overvoltage protection components more and more important, so suppress transient voltage, surge voltage and ESD chip components are undoubtedly indispensable. [0003] With the continuous miniaturization of mobile communication, personal d...

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Problems solved by technology

[0004] The traditional chip varistor is a single independent product. In terms of multi-line protection, it occupies a large area, which is not conducive to the miniaturization of equipment, and the installation efficiency of components is low, resulting in high cost of the whole machine

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