3D memory and operation method thereof

Abstract

A 3D memory constituted by multiple layer memories. Each layer of memory includes m word lines, n bit lines and a plurality of initial switch layers, where m, n are natural numbers. The initial switch layer consists of Chalcogenide material. Two initial switches C[i, j +1] and C[i +1, j] are provided in a region surrounded by the word line i, the word line i +1 and the bit line j, the bit line j +1; and no initial switch is provided in a region surrounded by the word line i +1, the word line i +2 and the bit line j, and the bit line j +1, wherein i is odd and 1<=i<=m-1; j is a natural number and j is in a range from 1 to n-1, the initial switch layer C[i, j +1] denotes an initial switch connecting the word line i and the bit line j +1, and the initial switch layer C[i +1, j] denotes an initial switch connecting the word line i +1 and the bit line j. Each initial switch constitutes a memory core along with the connected word line and the connected bit line.

Description

[0001] The present invention is a divisional application with the original application number 200510105365.1, the application date is September 23, 2005, and the invention name is "chalcogenide storage device" technical field [0002] The present invention relates to a storage device, and more particularly to a three-dimensional storage device without an access transistor (access transistor) and its operating method. Background technique [0003] A typical storage unit includes a steering element, such as one or more transistors (transistors are transistors, hereinafter referred to as transistors), for accessing each storage unit. The access transistor can also be a diode (a diode is a diode, hereinafter referred to as a diode), which provides a word line for accessing a bit line of a storage unit. Especially for reading and writing the data of the memory cell, the access transistor can act as a pass gate for accessing the word line to the bit line. For example, dynamic ran...

AI Technical Summary

Problems solved by technology

Since aluminum and copper are commonly used interlayer wiring metals, excluding these two metals will make interlayer wiring more difficult

In addition, when the three-dimensional memory is manufactured by packaging technology, the bonding alignment between layers will become very difficult

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