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Self-adaption on-board computer based on FPGA and method thereby for realizing dynamic allocation of internal resource

A technology of on-board computer and internal resources, applied in the field of aerospace data processing, can solve problems such as the inability to effectively manage reconfigurable FPGA resources, and achieve the effect of reducing hardware overhead, increasing flexibility, and simplifying the design process

Inactive Publication Date: 2010-07-28
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to solve the problem that traditional reconfigurable onboard computers cannot effectively manage reconfigurable FPGA resources, and provide a FPGA-based self-adaptive onboard computer and a method for implementing dynamic allocation of internal resources by using said computer

Method used

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  • Self-adaption on-board computer based on FPGA and method thereby for realizing dynamic allocation of internal resource
  • Self-adaption on-board computer based on FPGA and method thereby for realizing dynamic allocation of internal resource
  • Self-adaption on-board computer based on FPGA and method thereby for realizing dynamic allocation of internal resource

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specific Embodiment approach 1

[0012] Specific implementation mode one: the following combination figure 1 This embodiment will be specifically described. An FPGA-based self-adaptive on-board computer includes a SRAM type FPGA1, a PROM type FPGA configuration chip 5 and a Flash memory 2, and the internal resources of the SRAM type FPGA1 include two parts, a master control unit 1-1 and a reconfiguration unit array 1-2, Wherein the main control unit 1-1 includes a processor 1-1-1 and an FPGA on-chip configuration port 1-1-2, and the reconstruction unit array 1-2 consists of n reconstruction units 1-2-1 of exactly equal size Composition, the configuration output port of PROM type FPGA configuration chip 5 is connected with the off-chip configuration input port of SRAM type FPGA1, and the control input and output port of Flash memory 2 is connected with the external memory control input and output port of processor 1-1-1, wherein , n is an integer greater than 0.

[0013] When the reconfiguration port of SRAM...

specific Embodiment approach 2

[0014] Specific implementation mode two: the following combination figure 1 This embodiment will be specifically described. The difference between this embodiment and the FPGA-based self-adaptive onboard computer described in Embodiment 1 is that the Flash memory 2 is used to store user application program execution codes and configuration files of functional circuits, and the configuration files of each functional circuit The configuration file can call any reconfiguration unit 1-2-1 to construct the hardware circuit.

[0015] Flash memory 2 is a new type of non-volatile memory developed in recent years. It has the characteristics of no loss of data when power off, fast data access speed, electrical erasability, large capacity, online programmable, low price, and up to ten There are many advantages such as the erasing and writing times of 10,000 times and high reliability.

[0016] The FPGA-based self-adaptive onboard computer described in this embodiment can adopt the foll...

specific Embodiment approach 3

[0018] Specific implementation mode three: the following combination figure 1 This embodiment will be specifically described. The difference between this embodiment and the adaptive onboard computer based on FPGA described in Embodiment 1 is that it also includes a watchdog circuit 4, and the watchdog circuit 4 is realized by a watchdog chip, and the processor 1 The dog feeding signal output port of -1-1 is connected with the dog feeding signal input port of the watchdog circuit 4, and the reset signal output port of the watchdog circuit 4 is connected with the reset signal input port of the SRAM type FPGA1.

[0019] An FPGA-based self-adaptive on-board computer, in addition to adopting configuration file readback and flashing mechanisms, can also use a watchdog circuit to implement fault-tolerant design. The FPGA-based self-adaptive on-board computer described in this embodiment uses The watchdog circuit realizes the fault-tolerant design. The circuit periodically receives t...

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Abstract

The invention discloses a self-adaption on-board computer based on FPGA and a method thereby for realizing dynamic allocation of internal resource, belonging to the technical field of space flight and aviation data processing, and solving the problem that the traditional reconfigurable on-board computer can not effectively manage reconfigurable FPGA resource. The on-board computer of the invention is realized by SRAM-type FPGA, the internal source of the SRAM-type FPGA comprises a main control unit and a reconfigurable unit array composed of n reconfigurable units with exactly same size, and the SRAM-type FPGA supports parts of reconfigurable technology. The method for realizing dynamic allocation of internal resource of the invention is characterized in that the main control unit configures the reconfigurable unit in the idle condition into a corresponding hardware circuit according to a hardware circuit needed by threads when the on-board computer starts a thread; when the thread ends or stops, the main control unit clears the content of the reconfigurable unit of the hardware circuit to restore to the idle condition. The invention realizes the dynamic allocation of internal resource by the computer and is suitable for processing on-board data.

Description

technical field [0001] The invention relates to an FPGA-based on-board computer and a method for realizing dynamic allocation of internal resources by using the computer, and belongs to the technical field of aerospace data processing. Background technique [0002] The integration of modern small satellites is getting higher and higher, which requires their on-board computers to have powerful computing and data processing capabilities in a parallel multi-task environment. Ordinary spaceborne computers rely entirely on processors for calculations, which are inefficient and unable to meet the needs of small satellite technology development. The reconfigurable onboard computer uses processors and dedicated circuits to perform calculations together, and has strong computing capabilities, but it lacks effective management of reconfigurable FPGA resources. Therefore, under the condition of very limited hardware resources on the star, the traditional The reconfigurable on-board co...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F11/07
Inventor 孙兆伟刘源兰盛昌赵丹杨正贤徐国栋张世杰曹星惠叶东董晓光
Owner HARBIN INST OF TECH
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