Automated test circuit structure and method of SIM (Subscriber Identity Module)/USIM(Universal Subscriber Identity Module) controller in ARM digital baseband chip

Abstract

The invention relates to automated test circuit structure and method of a SIM / USIM controller in an ARM digital baseband chip. The structure comprises a test host, an ARM emulator, and a test circuit module carrying the ARM digital baseband chip; CLK (Clock) signal and data I / O signal pins of the SIM / USIM controller are respectively connected with a first GPIO (General Purpose Input / Output) pin and a second GPIO pin of the baseband chip; and the test host is connected with the ARM digital baseband chip through the ARM emulator. The method comprises the steps of: initiating a SIM / USIM controller register and a GPIO control register; reading the input signal value of the first GPIO pin, and detecting the CLK signal pin; configuring and driving the I / O signal pin to send a preset test data sequence; sampling and saving the input signal values on the first GPIO pin and the second GPIO pin; comparing and judging the correctness; and feeding results back to the test host. The automated test circuit structure and the method of a SIM / USIM controller in an ARM digital baseband chip have the advantages of simple and practical structure, reduced test cost, stable and reliable performance, strong portability and wider application scope.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to the technical field of chip testing, and specifically refers to a structure and method for an automatic testing circuit of a SIM / USIM card controller in an ARM digital baseband chip. Background technique [0002] Mobile phone chips account for more than 50% of the total cost of mobile phones, among which the baseband chip is the core part of the mobile phone and also the part with the highest technical content. The baseband chip provides all functions except radio frequency. In the development process, a relatively fixed chip architecture of DSP+ARM has been formed. [0003] All current general-purpose ARM processors support JTAG debugging. JTAG is ARM's debugging standard, and its ultimate concept is Boundary-Scan. The basic idea of ​​boundary scan technology is to add a shift register unit on the input and output pins close to the chip. When the chip is in the debugging s...

AI Technical Summary

Problems solved by technology

[0009] see again image 3 As shown, in the above-mentioned prior art scheme, it is necessary to specially make a test-specific PCB board and purchase a dedicated SIM test card

Usually, the production cycle of the PCB board is relatively long, and the SIM test card is also relatively expensive, which leads to a relatively cumbersome test process, a long test cycle, and high test costs, which brings some inconvenience to the smooth progress of the test work.

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