4*4 non-blocking optical router based on active micro-ring resonator

Abstract

The invention discloses a 4*4 non-blocking optical router based on an active micro-ring resonator. The optical router comprises four parallel waveguide micro-ring resonator 1*2 optical switches and four crossed waveguide micro-ring resonator 1*2 optical switches, wherein the four parallel waveguide micro-ring resonator 1*2 optical switches are connected to the four crossed waveguide micro-ring resonator 1*2 optical switches, so that the optical router comprises only four input terminals and four output terminals, and each waveguide corresponding to the component is sequentially coupled with four micro-ring resonators from the input terminals to the output terminals, wherein two micro-ring resonators are used for downloading the optical signals at the input terminals of the waveguides to the output terminals of the other two waveguides; and the other two micro-ring resonators are used for uploading the optical signals at the input terminals of the two waveguides to the output terminals corresponding to the waveguides, thus achieving the non-blocking router switch among four two-way communication ports.

Description

technical field [0001] The invention relates to the technical field of a switch for realizing routing switching among multiple ports in an on-chip optical network system, in particular to a 4×4 non-blocking optical router based on an active microring resonator. Background technique [0002] In the 1980s, R.A. Soref and others opened up a new field of silicon-based photonics. Because the large refractive index difference of the silicon waveguide makes it have a higher limitation on light transmission, not only the cross-sectional size of the waveguide can be reduced to the sub-wavelength level, but also the waveguide with a small curvature is allowed to bend. In terms of device integration, silicon-based photonic devices undoubtedly have great advantages. Secondly, the process of making silicon-based waveguide devices is compatible with the traditional CMOS process, so that mature processing technology can be used, and the hybrid integration of waveguide devices and microele...

AI Technical Summary

Problems solved by technology

The stagnation of microprocessor calculation speed is mainly due to the bottleneck limitation of electrical interconnection, and the same reason is increasingly limiting the performance improvement of parallel systems

The bottleneck of electrical interconnection includes: transmission bandwidth limitation, clock skew, high power consumption, which is not conducive to parallel computing

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