Semiconductor device and manufacturing method

Abstract

A method for fabricating a semiconductor device is disclosed. The method includes providing a substrate; forming at least one gate structure over the substrate; forming a plurality of doped regions in the substrate; forming an etch stop layer over the substrate; removing a first portion of the etch stop layer, wherein a second portion of the etch stop layer remains over the plurality of doped regions; forming a hard mask layer over the substrate; removing a first portion of the hard mask layer, wherein a second portion of the hard mask layer remains over the at least one gate structure; and forming a first contact through the second portion of the hard mask layer to the at least one gate structure, and a second contact through the second portion of the etch stop layer to the plurality of doped regions.

Description

technical field [0001] The invention relates to a method for manufacturing an integrated circuit device, and in particular to a method for manufacturing an integrated circuit device that can improve device performance. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have resulted in successive generations of IC production, each with smaller and more complex circuits than the previous generation. Conventional IC processing involves forming one or more contacts to various components in the IC. For example, in the process, contact openings are usually formed on the region (doped region) of the substrate (or wafer) and the gate structure thereon at the same time, but the traditional process of forming contact openings on the substrate and the gate structure will make The gate structure (eg, gate stack, such as polysilicon and / or gate electrodes) is corroded. This o...

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Problems solved by technology

For example, in the process, contact openings are usually formed on the region (doped region) of the substrate (or wafer) and the gate structure thereon at the same time, but the traditional process of forming contact openings on the substrate and the gate structure will make of the gate structure (e.g. gate stack, such as polysilicon and / or gate electrodes) are corroded

This over-etching of the gate structure can lead to unwanted contact resistance and degradation of device performance

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